diff options
author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-09-14 19:33:18 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-20 12:50:01 +0000 |
commit | d453208623bf17a9069c67c29b2ae7dc10f756dd (patch) | |
tree | 18231983f0c28abd5769cf30141b35bca288b8bb | |
parent | 9cc550eb8ef86f9c3ee46872a7485cf5a66fd924 (diff) |
soc/amd/cezanne/acpi/mmio: uncomment AOAC_DEVICE macro for UARTs
This enables runtime power management for the UART controllers.
BUG=b:183983959
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4e57d6312feda459cec65f330c6d2072774d4eb5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57681
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
-rw-r--r-- | src/soc/amd/cezanne/acpi/mmio.asl | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/amd/cezanne/acpi/mmio.asl b/src/soc/amd/cezanne/acpi/mmio.asl index 6126843f84..e00120afd9 100644 --- a/src/soc/amd/cezanne/acpi/mmio.asl +++ b/src/soc/amd/cezanne/acpi/mmio.asl @@ -88,8 +88,7 @@ Device (FUR0) } } - // TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0) + AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0) } Device (FUR1) { @@ -120,8 +119,7 @@ Device (FUR1) { } } - // TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0) + AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0) } Device (I2C0) { |