soc/intel: replace dt option PmTimerDisabled by Kconfig

Replace the dt option `PmTimerDisabled` with use of the Kconfig option
`USE_PM_ACPI_TIMER` for enabling/disabling the PM Timer.

A default value representing the prior devicetree value was added to the
boards system76/{lemp10,galp5,darp7}, so this change will not alter
behaviour.

Change-Id: If1811c6b98847b22272acfa35ca44f4fbca68947
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>

21 files changed, 31 insertions, 61 deletions

diff --git a/src/mainboard/system76/darp7/Kconfig b/src/mainboard/system76/darp7/Kconfig
index 4af6768163..2c9cbc45bc 100644
--- a/src/mainboard/system76/darp7/Kconfig
+++ b/src/mainboard/system76/darp7/Kconfig
@@ -52,4 +52,8 @@ config POST_DEVICE
 config UART_FOR_CONSOLE
 	default 2
 
+# PM Timer Disabled, saves power
+config USE_PM_ACPI_TIMER
+	default n
+
 endif
diff --git a/src/mainboard/system76/darp7/devicetree.cb b/src/mainboard/system76/darp7/devicetree.cb
index c5297dce37..1397097337 100644
--- a/src/mainboard/system76/darp7/devicetree.cb
+++ b/src/mainboard/system76/darp7/devicetree.cb
@@ -26,10 +26,6 @@ chip soc/intel/tigerlake
 		.tdp_pl2_override = 40,
 	}"
 
-# Finalize (soc/intel/tigerlake/finalize.c)
-	# PM Timer Disabled, saves power
-	register "PmTimerDisabled" = "1"
-
 # FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
 	# Enable C6 DRAM
 	register "enable_c6dram" = "1"
diff --git a/src/mainboard/system76/galp5/Kconfig b/src/mainboard/system76/galp5/Kconfig
index 79978c9a5d..534c25319f 100644
--- a/src/mainboard/system76/galp5/Kconfig
+++ b/src/mainboard/system76/galp5/Kconfig
@@ -53,4 +53,8 @@ config POST_DEVICE
 config UART_FOR_CONSOLE
 	default 2
 
+# PM Timer Disabled, saves power
+config USE_PM_ACPI_TIMER
+	default n
+
 endif
diff --git a/src/mainboard/system76/galp5/devicetree.cb b/src/mainboard/system76/galp5/devicetree.cb
index 322a2e1049..cf3a75e50f 100644
--- a/src/mainboard/system76/galp5/devicetree.cb
+++ b/src/mainboard/system76/galp5/devicetree.cb
@@ -26,10 +26,6 @@ chip soc/intel/tigerlake
 		.tdp_pl2_override = 51,
 	}"
 
-# Finalize (soc/intel/tigerlake/finalize.c)
-	# PM Timer Disabled, saves power
-	register "PmTimerDisabled" = "1"
-
 # FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
 	# Enable C6 DRAM
 	register "enable_c6dram" = "1"
diff --git a/src/mainboard/system76/lemp10/Kconfig b/src/mainboard/system76/lemp10/Kconfig
index 637c90285d..1b6eec4a77 100644
--- a/src/mainboard/system76/lemp10/Kconfig
+++ b/src/mainboard/system76/lemp10/Kconfig
@@ -52,4 +52,8 @@ config POST_DEVICE
 config UART_FOR_CONSOLE
 	default 2
 
+# PM Timer Disabled, saves power
+config USE_PM_ACPI_TIMER
+	default n
+
 endif
diff --git a/src/mainboard/system76/lemp10/devicetree.cb b/src/mainboard/system76/lemp10/devicetree.cb
index f286ab50a0..1362b3d81a 100644
--- a/src/mainboard/system76/lemp10/devicetree.cb
+++ b/src/mainboard/system76/lemp10/devicetree.cb
@@ -26,10 +26,6 @@ chip soc/intel/tigerlake
 		.tdp_pl2_override = 30,
 	}"
 
-# Finalize (soc/intel/tigerlake/finalize.c)
-	# PM Timer Disabled, saves power
-	register "PmTimerDisabled" = "1"
-
 # FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
 	# Enable C6 DRAM
 	register "enable_c6dram" = "1"
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index d3a41ee733..e98878f14e 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -41,6 +41,7 @@ config CPU_SPECIFIC_OPTIONS
 	select PARALLEL_MP_AP_WORK
 	select MICROCODE_BLOB_UNDISCLOSED
 	select PLATFORM_USES_FSP2_2
+	select PM_ACPI_TIMER_OPTIONAL
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select PMC_LOW_POWER_MODE_PROGRAM
 	select SOC_INTEL_COMMON
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index 270400b341..699626b767 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -286,7 +286,7 @@ struct soc_intel_alderlake_config {
 
 	/* Enable C6 DRAM */
 	uint8_t enable_c6dram;
-	uint8_t PmTimerDisabled;
+
 	/*
 	 * SerialIO device mode selection:
 	 * PchSerialIoDisabled,
diff --git a/src/soc/intel/alderlake/finalize.c b/src/soc/intel/alderlake/finalize.c
index c821e25769..4ef572b5f6 100644
--- a/src/soc/intel/alderlake/finalize.c
+++ b/src/soc/intel/alderlake/finalize.c
@@ -50,7 +50,7 @@ static void pch_handle_sideband(config_t *config)
 
 static void pch_finalize(void)
 {
-	config_t *config;
+	config_t *config = config_of_soc();
 
 	/* TCO Lock down */
 	tco_lockdown();
@@ -58,13 +58,12 @@ static void pch_finalize(void)
 	/* TODO: Add Thermal Configuration */
 
 	/*
-	 * Disable ACPI PM timer based on dt policy
+	 * Disable ACPI PM timer based on Kconfig
 	 *
 	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
 	 * Disabling ACPI PM timer also switches off TCO
 	 */
-	config = config_of_soc();
-	if (config->PmTimerDisabled)
+	if (!CONFIG(USE_PM_ACPI_TIMER))
 		pmc_disable_acpi_timer();
 
 	pch_handle_sideband(config);
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 6d44cd649c..07af2faf66 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -31,6 +31,7 @@ config CPU_SPECIFIC_OPTIONS
 	select PARALLEL_MP_AP_WORK
 	select MICROCODE_BLOB_UNDISCLOSED
 	select PLATFORM_USES_FSP2_1
+	select PM_ACPI_TIMER_OPTIONAL
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select PMC_LOW_POWER_MODE_PROGRAM
 	select SOC_INTEL_COMMON
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index b36d67a55f..e18e52db94 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -236,8 +236,6 @@ struct soc_intel_elkhartlake_config {
 	/* Enable C6 DRAM */
 	uint8_t enable_c6dram;
 
-	uint8_t PmTimerDisabled;
-
 	/*
 	 * SerialIO device mode selection:
 	 * PchSerialIoDisabled,
diff --git a/src/soc/intel/elkhartlake/finalize.c b/src/soc/intel/elkhartlake/finalize.c
index 3d1430fbe3..ad3b4ef867 100644
--- a/src/soc/intel/elkhartlake/finalize.c
+++ b/src/soc/intel/elkhartlake/finalize.c
@@ -24,26 +24,18 @@
 
 static void pch_finalize(void)
 {
-	config_t *config;
-
 	/* TCO Lock down */
 	tco_lockdown();
 
 	/* TODO: Add Thermal Configuration */
 
 	/*
-	 * Disable ACPI PM timer based on dt policy
+	 * Disable ACPI PM timer based on Kconfig
 	 *
 	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
 	 * Disabling ACPI PM timer also switches off TCO
-	 *
-	 * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is
-	 * just required to get to chip config. PCH_DEV_PMC is hidden by this
-	 * point and hence removed from the root bus. pcidev_path_on_root thus
-	 * returns NULL for PCH_DEV_PMC device.
 	 */
-	config = config_of_soc();
-	if (config->PmTimerDisabled)
+	if (!CONFIG(USE_PM_ACPI_TIMER))
 		pmc_disable_acpi_timer();
 
 	pmc_clear_pmcon_sts();
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 8f6303de80..74bae9c433 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -31,6 +31,7 @@ config CPU_SPECIFIC_OPTIONS
 	select PARALLEL_MP_AP_WORK
 	select MICROCODE_BLOB_UNDISCLOSED
 	select PLATFORM_USES_FSP2_1
+	select PM_ACPI_TIMER_OPTIONAL
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select PMC_LOW_POWER_MODE_PROGRAM
 	select CPU_INTEL_COMMON
diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h
index bef9adb4e2..9adc5b0565 100644
--- a/src/soc/intel/icelake/chip.h
+++ b/src/soc/intel/icelake/chip.h
@@ -144,8 +144,6 @@ struct soc_intel_icelake_config {
 	/* Enable C6 DRAM */
 	uint8_t enable_c6dram;
 
-	uint8_t PmTimerDisabled;
-
 	/*
 	 * SerialIO device mode selection:
 	 * PchSerialIoDisabled,
diff --git a/src/soc/intel/icelake/finalize.c b/src/soc/intel/icelake/finalize.c
index bc8386abcc..f828cc461d 100644
--- a/src/soc/intel/icelake/finalize.c
+++ b/src/soc/intel/icelake/finalize.c
@@ -40,7 +40,7 @@ static void pch_handle_sideband(config_t *config)
 
 static void pch_finalize(void)
 {
-	config_t *config;
+	config_t *config = config_of_soc();
 
 	/* TCO Lock down */
 	tco_lockdown();
@@ -55,18 +55,12 @@ static void pch_finalize(void)
 	pch_thermal_configuration();
 
 	/*
-	 * Disable ACPI PM timer based on dt policy
+	 * Disable ACPI PM timer based on Kconfig
 	 *
 	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
 	 * Disabling ACPI PM timer also switches off TCO
-	 *
-	 * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is
-	 * just required to get to chip config. PCH_DEV_PMC is hidden by this
-	 * point and hence removed from the root bus. pcidev_path_on_root thus
-	 * returns NULL for PCH_DEV_PMC device.
 	 */
-	config = config_of_soc();
-	if (config->PmTimerDisabled)
+	if (!CONFIG(USE_PM_ACPI_TIMER))
 		pmc_disable_acpi_timer();
 
 	pch_handle_sideband(config);
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 3f9014cbac..690df0cf2d 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -32,6 +32,7 @@ config CPU_SPECIFIC_OPTIONS
 	select PARALLEL_MP_AP_WORK
 	select MICROCODE_BLOB_UNDISCLOSED
 	select PLATFORM_USES_FSP2_2
+	select PM_ACPI_TIMER_OPTIONAL
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select PMC_LOW_POWER_MODE_PROGRAM
 	select SOC_INTEL_COMMON
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 3d680d3b7e..87a98fb351 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -152,8 +152,6 @@ struct soc_intel_jasperlake_config {
 	/* Enable C6 DRAM */
 	uint8_t enable_c6dram;
 
-	uint8_t PmTimerDisabled;
-
 	/*
 	 * SerialIO device mode selection:
 	 * PchSerialIoDisabled,
diff --git a/src/soc/intel/jasperlake/finalize.c b/src/soc/intel/jasperlake/finalize.c
index a60e71916e..9aef9eb5d9 100644
--- a/src/soc/intel/jasperlake/finalize.c
+++ b/src/soc/intel/jasperlake/finalize.c
@@ -44,7 +44,7 @@ static void pch_finalize(void)
 {
 	uint32_t reg32;
 	uint8_t *pmcbase;
-	config_t *config;
+	config_t *config = config_of_soc();
 
 	/* TCO Lock down */
 	tco_lockdown();
@@ -52,18 +52,12 @@ static void pch_finalize(void)
 	/* TODO: Add Thermal Configuration */
 
 	/*
-	 * Disable ACPI PM timer based on dt policy
+	 * Disable ACPI PM timer based on Kconfig
 	 *
 	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
 	 * Disabling ACPI PM timer also switches off TCO
-	 *
-	 * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is
-	 * just required to get to chip config. PCH_DEV_PMC is hidden by this
-	 * point and hence removed from the root bus. pcidev_path_on_root thus
-	 * returns NULL for PCH_DEV_PMC device.
 	 */
-	config = config_of_soc();
-	if (config->PmTimerDisabled)
+	if (!CONFIG(USE_PM_ACPI_TIMER))
 		pmc_disable_acpi_timer();
 
 	pmcbase = pmc_mmio_regs();
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 37391782d2..fe7805ae70 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -40,6 +40,7 @@ config CPU_SPECIFIC_OPTIONS
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP_AP_WORK
 	select PLATFORM_USES_FSP2_2
+	select PM_ACPI_TIMER_OPTIONAL
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select PMC_LOW_POWER_MODE_PROGRAM
 	select SOC_INTEL_COMMON
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 465dea279a..f0858db1b8 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -289,7 +289,7 @@ struct soc_intel_tigerlake_config {
 
 	/* Enable C6 DRAM */
 	uint8_t enable_c6dram;
-	uint8_t PmTimerDisabled;
+
 	/*
 	 * SerialIO device mode selection:
 	 * PchSerialIoDisabled,
diff --git a/src/soc/intel/tigerlake/finalize.c b/src/soc/intel/tigerlake/finalize.c
index 6ed60e7eef..26cba96491 100644
--- a/src/soc/intel/tigerlake/finalize.c
+++ b/src/soc/intel/tigerlake/finalize.c
@@ -30,8 +30,6 @@
 
 static void pch_finalize(void)
 {
-	config_t *config;
-
 	/* TCO Lock down */
 	tco_lockdown();
 
@@ -42,14 +40,8 @@ static void pch_finalize(void)
 	 *
 	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
 	 * Disabling ACPI PM timer also switches off TCO
-	 *
-	 * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is
-	 * just required to get to chip config. PCH_DEV_PMC is hidden by this
-	 * point and hence removed from the root bus. pcidev_path_on_root thus
-	 * returns NULL for PCH_DEV_PMC device.
 	 */
-	config = config_of_soc();
-	if (config->PmTimerDisabled)
+	if (!CONFIG(USE_PM_ACPI_TIMER))
 		pmc_disable_acpi_timer();
 
 	pmc_clear_pmcon_sts();