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| author | Wonkyu Kim <wonkyu.kim@intel.com> | 2019-01-11 13:46:18 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-14 12:04:39 +0000 |
| commit | cb5323415e5eaa7aabc7f4e359274562cab131e3 (patch) | |
| tree | 9f99af5cfcb684e729b43b45691e2c4d5fb63c43 | |
| parent | c6ff1ac29e9ecc3c62662f43b5ea260578fbb3d5 (diff) | |
mb/intel/coffeelake_rvp: Update mainboard UART Kconfig
Update mainboard UART Kconfig for Whiskylake RVP.
TEST=Build and test on Whiskylake RVP.
By default we can still get console from cbmem, and
enable CONSOLE_SERIAL can get logs from UART port2.
Select other Coffeelake RVPs and check CONSOLE_SERIAL is enabled.
Change-Id: Ic56c019a12b467e5bede5648098d3fb82b56ba7e
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-on: https://review.coreboot.org/c/30861
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
| -rw-r--r-- | src/mainboard/intel/coffeelake_rvp/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig b/src/mainboard/intel/coffeelake_rvp/Kconfig index 9474c513b2..95eeeff284 100644 --- a/src/mainboard/intel/coffeelake_rvp/Kconfig +++ b/src/mainboard/intel/coffeelake_rvp/Kconfig @@ -7,6 +7,7 @@ config BOARD_SPECIFIC_OPTIONS select GENERIC_SPD_BIN select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE if BOARD_INTEL_WHISKEYLAKE_RVP select MAINBOARD_HAS_CHROMEOS select GENERIC_SPD_BIN select DRIVERS_I2C_HID @@ -48,6 +49,11 @@ config MAX_CPUS default 12 if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 default 8 +config UART_FOR_CONSOLE + int + default 2 if BOARD_INTEL_WHISKEYLAKE_RVP + default 0 + config DEVICETREE string default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" |