diff options
author | Felix Singer <felixsinger@posteo.net> | 2020-07-26 09:25:04 +0200 |
---|---|---|
committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-07-28 08:37:39 +0000 |
commit | ca4164e629a8162dc6b297c13a725a9f2b3ee4eb (patch) | |
tree | 4177bec301c8766c6b566e2297de584cf3d4c4ad | |
parent | 5c10704f58982d62a1326e5d6ff9956e0eaf6e16 (diff) |
soc/intel/jasperlake: Simplify is-device-enabled checks
Simplify if-statements and use is_dev_enabled() where possible.
Change-Id: I744939bee3d51ac25c1cc2dcd3359fe571c9e408
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43898
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/soc/intel/jasperlake/acpi.c | 5 | ||||
-rw-r--r-- | src/soc/intel/jasperlake/fsp_params.c | 27 | ||||
-rw-r--r-- | src/soc/intel/jasperlake/romstage/fsp_params.c | 26 |
3 files changed, 22 insertions, 36 deletions
diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c index 5911a2f875..8673da17ea 100644 --- a/src/soc/intel/jasperlake/acpi.c +++ b/src/soc/intel/jasperlake/acpi.c @@ -3,6 +3,7 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> +#include <device/device.h> #include <device/mmio.h> #include <arch/smp/mpspec.h> #include <cbmem.h> @@ -187,7 +188,7 @@ static unsigned long soc_fill_dmar(unsigned long current) uint64_t gfxvtbar = MCHBAR64(GFXVTBAR) & VTBAR_MASK; bool gfxvten = MCHBAR32(GFXVTBAR) & VTBAR_ENABLED; - if (igfx_dev && igfx_dev->enabled && gfxvtbar && gfxvten) { + if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { unsigned long tmp = current; current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); @@ -200,7 +201,7 @@ static unsigned long soc_fill_dmar(unsigned long current) uint64_t ipuvtbar = MCHBAR64(IPUVTBAR) & VTBAR_MASK; bool ipuvten = MCHBAR32(IPUVTBAR) & VTBAR_ENABLED; - if (ipu_dev && ipu_dev->enabled && ipuvtbar && ipuvten) { + if (is_dev_enabled(ipu_dev) && ipuvtbar && ipuvten) { unsigned long tmp = current; current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar); diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c index cdafae3cc8..204364bbd9 100644 --- a/src/soc/intel/jasperlake/fsp_params.c +++ b/src/soc/intel/jasperlake/fsp_params.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <assert.h> #include <console/console.h> +#include <device/device.h> #include <fsp/api.h> #include <fsp/ppi/mp_service_ppi.h> #include <fsp/util.h> @@ -92,11 +93,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Check if IGD is present and fill Graphics init param accordingly */ dev = pcidev_path_on_root(SA_DEVFN_IGD); - - if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) - params->PeiGraphicsPeimInit = 1; - else - params->PeiGraphicsPeimInit = 0; + params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev); /* Use coreboot MP PPI services if Kconfig is enabled */ if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) { @@ -161,8 +158,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* SATA */ dev = pcidev_path_on_root(PCH_DEVFN_SATA); - if (dev) { - params->SataEnable = dev->enabled; + params->SataEnable = is_dev_enabled(dev); + if (params->SataEnable) { params->SataMode = config->SataMode; params->SataSalpSupport = config->SataSalpSupport; @@ -175,18 +172,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) ARRAY_SIZE(config->SataPortsDevSlp), "copy buffer overflow!"); memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp, sizeof(params->SataPortsDevSlp)); - } else { - params->SataEnable = 0; } /* SDCard related configuration */ dev = pcidev_path_on_root(PCH_DEVFN_SDCARD); - if (!dev) { - params->ScsSdCardEnabled = 0; - } else { - params->ScsSdCardEnabled = dev->enabled; + params->ScsSdCardEnabled = is_dev_enabled(dev); + if (params->ScsSdCardEnabled) params->SdCardPowerEnableActiveHigh = config->SdCardPowerEnableActiveHigh; - } params->Device4Enable = config->Device4Enable; @@ -195,12 +187,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* eMMC configuration */ dev = pcidev_path_on_root(PCH_DEVFN_EMMC); - if (!dev) { - params->ScsEmmcEnabled = 0; - } else { - params->ScsEmmcEnabled = dev->enabled; + params->ScsEmmcEnabled = is_dev_enabled(dev); + if (params->ScsEmmcEnabled) params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled; - } /* Enable xDCI controller if enabled in devicetree and allowed */ dev = pcidev_path_on_root(PCH_DEVFN_USBOTG); diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c index 0688eea3a4..809ae805bf 100644 --- a/src/soc/intel/jasperlake/romstage/fsp_params.c +++ b/src/soc/intel/jasperlake/romstage/fsp_params.c @@ -2,6 +2,7 @@ #include <assert.h> #include <console/console.h> +#include <device/device.h> #include <fsp/util.h> #include <soc/pci_devs.h> #include <soc/romstage.h> @@ -12,18 +13,16 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_jasperlake_config *config) { unsigned int i; - const struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD); + const struct device *dev; uint32_t mask = 0; - if (!dev || !dev->enabled) { - /* Skip IGD initialization in FSP if device is disabled in devicetree.cb */ - m_cfg->InternalGfx = 0; - m_cfg->IgdDvmt50PreAlloc = 0; - } else { - m_cfg->InternalGfx = 1; - /* Set IGD stolen size to 60MB. */ - m_cfg->IgdDvmt50PreAlloc = 0xFE; - } + /* + * If IGD is enabled, set IGD stolen size to 60MB. + * Otherwise, skip IGD init in FSP. + */ + dev = pcidev_path_on_root(SA_DEVFN_IGD); + m_cfg->InternalGfx = is_dev_enabled(dev); + m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? 0xFE : 0; m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; m_cfg->SaGv = config->SaGv; @@ -61,7 +60,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, /* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); - if (dev && dev->enabled && config->TraceHubMode) { + if (is_dev_enabled(dev) && config->TraceHubMode) { m_cfg->PcdDebugInterfaceFlags |= DEBUG_INTERFACE_TRACEHUB; m_cfg->PchTraceHubMode = config->TraceHubMode; m_cfg->CpuTraceHubMode = config->TraceHubMode; @@ -92,10 +91,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, /* Audio */ dev = pcidev_path_on_root(PCH_DEVFN_HDA); - if (!dev) - m_cfg->PchHdaEnable = 0; - else - m_cfg->PchHdaEnable = dev->enabled; + m_cfg->PchHdaEnable = is_dev_enabled(dev); m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable; |