diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-12 18:46:52 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-13 20:32:11 +0000 |
commit | c8dfd6d935505ae45783cb1e15ea0a6683938b0c (patch) | |
tree | 5fc44b6d51d172da2e35af052793c430ad372e10 | |
parent | 7949a1b73b12f83c6eff29359085c6b01ef6cac9 (diff) |
soc/amd/genoa/acpi/soc: add root bridges to DSDT
Add the 4 root bridge devices using the ROOT_BRIDGE macro.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If405a90981e5c1fea51935c520800a245473317e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79467
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/soc/amd/genoa/acpi/soc.asl | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/acpi/soc.asl b/src/soc/amd/genoa/acpi/soc.asl index 00eb48a43a..0959ecab9d 100644 --- a/src/soc/amd/genoa/acpi/soc.asl +++ b/src/soc/amd/genoa/acpi/soc.asl @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <soc/amd/common/acpi/pci_root.asl> #include "globalnvs.asl" Scope(\_SB) { @@ -7,4 +8,9 @@ Scope(\_SB) { #include "pci_int_defs.asl" #include "mmio.asl" + + ROOT_BRIDGE(S0B0) + ROOT_BRIDGE(S0B1) + ROOT_BRIDGE(S0B2) + ROOT_BRIDGE(S0B3) } /* End \_SB scope */ |