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authorVictor Ding <victording@google.com>2021-04-15 04:31:54 +0000
committerMartin Roth <martinroth@google.com>2021-04-16 17:16:21 +0000
commitc82db71bde63fd3602f3ef890c55135d26a8756e (patch)
treedcedcb576fb345c59822599814773bf4b54df4e5
parent582d7c340c9186f0f5cdecce201bf54941fa5b28 (diff)
mb/google/zork: Configure HID over I2C related GPIO as level-triggered
Both touchpads supported by zork use level-triggered wakeup signal. BRANCH=zork BUG=b:172846122,b:182911201 TEST=1. cros build-ap -b zork 2. both Synaptics and ELAN touchpads work fine on Vilboz 3. Wakeup source is correctly reported on Vilboz Signed-off-by: Victor Ding <victording@google.com> Change-Id: Icc2b5ad3bd434c9759a0fdfc121aa3c94f46630e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52367 Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c2
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index 42d0f90199..0ae382f1e1 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -28,7 +28,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* I2S_LRCLK - Bit banged in depthcharge */
PAD_NF(GPIO_8, ACP_I2S_LRCLK, PULL_NONE),
/* TOUCHPAD_INT_ODL */
- PAD_SCI(GPIO_9, PULL_NONE, EDGE_LOW),
+ PAD_SCI(GPIO_9, PULL_NONE, LEVEL_LOW),
/* S0iX SLP - goes to EC */
PAD_GPO(GPIO_10, HIGH),
/* EC_IN_RW_OD */
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index bf9833bf4b..9083e5f012 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -30,7 +30,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* I2S_LRCLK - Bit banged in depthcharge */
PAD_NF(GPIO_8, ACP_I2S_LRCLK, PULL_NONE),
/* TOUCHPAD_INT_ODL */
- PAD_SCI(GPIO_9, PULL_NONE, EDGE_LOW),
+ PAD_SCI(GPIO_9, PULL_NONE, LEVEL_LOW),
/* S0iX SLP - goes to EC & FPMCU */
PAD_GPO(GPIO_10, HIGH),
/* USI_INT_ODL */