diff options
| author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2017-05-03 15:53:01 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-05 23:24:12 +0200 |
| commit | c623aa055d590501e14669277bfa3ba46c5ec22b (patch) | |
| tree | 25ae9c111dfeecea92847b96585c41d4add0b72a | |
| parent | e68d22fbbc8bd1e2644e3fb75ec76b356502604a (diff) | |
pci_device: add PCI device IDs for Intel platforms
Add host of PCI device Ids for IPs in Intel platforms.
Change-Id: I0eee9409df3e6dc326b60bc82c2b715c70e7debd
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/19541
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/include/device/pci_ids.h | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 023238753f..f243414f8b 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2658,6 +2658,113 @@ #define PCI_DEVICE_ID_INTEL_LYNXPOINT_MOB_DESK_MIN 0x8c41 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_MOB_DESK_MAX 0x8c4f +/* Intel LPC device ids */ +#define PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE 0x9d41 +#define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE 0x9d43 +#define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM 0x9d48 +#define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM 0x9d46 +#define PCI_DEVICE_ID_INTEL_KBP_H_C236 0xa150 +#define PCI_DEVICE_ID_INTEL_KBP_H_PREMIUM 0xa14e +#define PCI_DEVICE_ID_INTEL_KBP_H_QM170 0xa14d +#define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22 0x9d4b +#define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22 0x9d4e +#define PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU 0x9d51 +#define PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM 0x9d58 +#define PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM 0x9d56 +#define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8 + +/* Intel SATA device Ids */ +#define PCI_DEVICE_ID_INTEL_SPT_U_SATA 0x9d03 +#define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA 0x9d07 +#define PCI_DEVICE_ID_INTEL_SPT_KBL_SATA 0x282a +#define PCI_DEVICE_ID_INTEL_APL_SATA 0x5ae0 + +/* Intel PMC device Ids */ +#define PCI_DEVICE_ID_INTEL_SPT_LP_PMC 0x9d21 +#define PCI_DEVICE_ID_INTEL_KBP_H_PMC 0xa121 +#define PCI_DEVICE_ID_INTEL_APL_PMC 0x5a94 + +/* Intel I2C device Ids */ +#define PCI_DEVICE_ID_INTEL_SPT_I2C0 0x9d60 +#define PCI_DEVICE_ID_INTEL_SPT_I2C1 0x9d61 +#define PCI_DEVICE_ID_INTEL_SPT_I2C2 0x9d62 +#define PCI_DEVICE_ID_INTEL_SPT_I2C3 0x9d63 +#define PCI_DEVICE_ID_INTEL_SPT_I2C4 0x9d64 +#define PCI_DEVICE_ID_INTEL_SPT_I2C5 0x9d65 +#define PCI_DEVICE_ID_INTEL_APL_I2C0 0x5aac +#define PCI_DEVICE_ID_INTEL_APL_I2C1 0x5aae +#define PCI_DEVICE_ID_INTEL_APL_I2C2 0x5ab0 +#define PCI_DEVICE_ID_INTEL_APL_I2C3 0x5ab2 +#define PCI_DEVICE_ID_INTEL_APL_I2C4 0x5ab4 +#define PCI_DEVICE_ID_INTEL_APL_I2C5 0x5ab6 +#define PCI_DEVICE_ID_INTEL_APL_I2C6 0x5ab8 +#define PCI_DEVICE_ID_INTEL_APL_I2C7 0x5aba + +/* Intel UART device Ids */ +#define PCI_DEVICE_ID_INTEL_SPT_UART0 0x9d27 +#define PCI_DEVICE_ID_INTEL_SPT_UART1 0x9d28 +#define PCI_DEVICE_ID_INTEL_SPT_UART2 0x9d66 +#define PCI_DEVICE_ID_INTEL_KBP_H_UART0 0xa127 +#define PCI_DEVICE_ID_INTEL_KBP_H_UART1 0xa128 +#define PCI_DEVICE_ID_INTEL_KBP_H_UART2 0xa166 +#define PCI_DEVICE_ID_INTEL_APL_UART0 0x5abc +#define PCI_DEVICE_ID_INTEL_APL_UART1 0x5abe +#define PCI_DEVICE_ID_INTEL_APL_UART2 0x5ac0 +#define PCI_DEVICE_ID_INTEL_APL_UART3 0x5aee + +/* Intel SPI device Ids */ +#define PCI_DEVICE_ID_INTEL_SPT_SPI1 0x9d24 +#define PCI_DEVICE_ID_INTEL_SPT_SPI2 0x9d29 +#define PCI_DEVICE_ID_INTEL_SPT_SPI3 0x9d2a +#define PCI_DEVICE_ID_INTEL_APL_SPI0 0x5ac2 +#define PCI_DEVICE_ID_INTEL_APL_SPI1 0x5ac4 +#define PCI_DEVICE_ID_INTEL_APL_SPI2 0x5ac6 +#define PCI_DEVICE_ID_INTEL_APL_HWSEQ_SPI 0x5a96 + +/* Intel IGD device Ids */ +#define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906 +#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E +#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM 0x1916 +#define PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM 0x191B +#define PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM 0x193D +#define PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM 0x5906 +#define PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM 0x591E +#define PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM 0x5916 +#define PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR 0x5917 +#define PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM 0x591B +#define PCI_DEVICE_ID_INTEL_APL_IGD_HD_505 0x5a84 +#define PCI_DEVICE_ID_INTEL_APL_IGD_HD_500 0x5a85 + +/* Intel Northbridge Ids */ +#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0 + +/* Intel SMBUS device Ids */ +#define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23 +#define PCI_DEVICE_ID_INTEL_SPT_H_SMBUS 0xa123 + +/* Intel XHCI device Ids */ +#define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8 +#define PCI_DEVICE_ID_INTEL_GLK_XHCI 0x31a8 +#define PCI_DEVICE_ID_INTEL_SPT_LP_XHCI 0x9d2f +#define PCI_DEVICE_ID_INTEL_KBP_H_XHCI 0xa12f + +/* Intel P2SB device Ids */ +#define PCI_DEVICE_ID_INTEL_APL_P2SB 0x5a92 + +/* Intel SRAM device Ids */ +#define PCI_DEVICE_ID_INTEL_APL_SRAM 0x5aec + +/* Intel AUDIO device Ids */ +#define PCI_DEVICE_ID_INTEL_APL_AUDIO 0x5a98 + +/* Intel HECI/ME device Ids */ +#define PCI_DEVICE_ID_INTEL_APL_CSE0 0x5a9a + +/* Intel XDCI device Ids */ +#define PCI_DEVICE_ID_INTEL_APL_XDCI 0x5aaa +#define PCI_DEVICE_ID_INTEL_GLK_XDCI 0x31aa +#define PCI_DEVICE_ID_INTEL_SPT_LP_XDCI 0x9d30 + #define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 #define PCI_DEVICE_ID_COMPUTONE_PG 0x0302 |