diff options
| author | Ziyuan Xu <xzy.xu@rock-chips.com> | 2016-09-18 10:49:52 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-12-13 19:46:14 +0100 |
| commit | c53cf64e46281657794277d8560ee3fd302e9cab (patch) | |
| tree | 032cd9e86e9dd791f75cdbd231c8113bfb024f8e | |
| parent | 0803ba47a418ccbe26913f7b7600313d650891de (diff) | |
rockchip: rk3399: change emmc clk to 148.5MHz
Set aclk_emmc and clk_emmc to 148.5MHz under hs400es mode, which could
improve stability like kernel.
CQ-DEPEND=CL:386527
BUG=chrome-os-partner:54377
BRANCH=none
TEST=build and boot on kevin
Change-Id: Iaa76d3ec1ab999eb317a9ab6c7e3525594b15b57
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e6eb1f56371aea51f2584a97bf817189d61090b2
Original-Change-Id: If4754d22e83a0f9a029fedca12f26ff5ae8d44e1
Original-Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/386865
Original-Commit-Ready: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/17790
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/soc/rockchip/rk3399/clock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c index 5acf90a0c9..383a761d60 100644 --- a/src/soc/rockchip/rk3399/clock.c +++ b/src/soc/rockchip/rk3399/clock.c @@ -807,8 +807,8 @@ void rkclk_configure_tsadc(unsigned int hz) void rkclk_configure_emmc(void) { int src_clk_div; - int aclk_emmc = 198*MHz; - int clk_emmc = 198*MHz; + int aclk_emmc = 148500*KHz; + int clk_emmc = 148500*KHz; /* Select aclk_emmc source from GPLL */ src_clk_div = GPLL_HZ / aclk_emmc; |