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authorTobias Diedrich <ranma+coreboot@tdiedrich.de>2010-11-09 22:31:11 +0000
committerRudolf Marek <r.marek@assembler.cz>2010-11-09 22:31:11 +0000
commitc29246739af6faa56ceba4e912968464cbc9f4de (patch)
tree4d9e9c6615caf476373ebca55b71d0257900d99c
parent8b3cac2a6c8790abda72e386ed60dea39f322a54 (diff)
This fixes a FIXME in src/cpu/amd/mtrr/amd_mtrr.c and shuts up the
Linux kernel, which was previously complaining that the MTRR setup is wrong, if the cpu supports more than CONFIG_CPU_ADDR_BITS bits of address space. Shamelessly copied from Linux arch/x86/kernel/cpu/mtrr/main.c Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Acked-by: Scott Duplichan <scott@notabs.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/cpu/amd/mtrr/amd_mtrr.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index c113f3f8fa..26f4cbe80a 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -1,5 +1,6 @@
#include <console/console.h>
#include <device/device.h>
+#include <arch/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/cache.h>
@@ -175,11 +176,13 @@ void amd_setup_mtrrs(void)
enable_cache();
- /* FIXME we should probably query the cpu for this
- * but so far this is all any recent AMD cpu has supported.
- */
address_bits = CONFIG_CPU_ADDR_BITS; //K8 could be 40, and GH could be 48
+ /* AMD specific cpuid function to query number of address bits */
+ if (cpuid_eax(0x80000000) >= 0x80000008) {
+ address_bits = cpuid_eax(0x80000008) & 0xff;
+ }
+
/* Now that I have mapped what is memory and what is not
* Setup the mtrrs so we can cache the memory.
*/