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authorArthur Heymans <arthur@aheymans.xyz>2020-11-23 15:45:00 +0100
committerArthur Heymans <arthur@aheymans.xyz>2020-12-15 17:49:39 +0000
commitc2503dbe8864a3a3b917f08794d2414455118891 (patch)
tree2762cb175d4e93bfa46fe907418e9e0d5ec150f9
parent6452a9fcfc072f85101abf0f476e10c6727d6b69 (diff)
soc/intel/xeon_sp: Fix final MTRR usage
The region top_of_ram -> cbmem_top is used by FSP and cbmem, but is also just regular DRAM. Marking it as such improves the final MTRR solution a lot and fixes MTRR starvation depending on the setup. Change-Id: I19ff7cf2d699b4cc34caccd91cafd6a284d699d3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47868 Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/xeon_sp/uncore.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c
index de29dea2b4..8965b3b81f 100644
--- a/src/soc/intel/xeon_sp/uncore.c
+++ b/src/soc/intel/xeon_sp/uncore.c
@@ -200,6 +200,11 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
LOG_MEM_RESOURCE("low_ram", dev, index, base_kb, size_kb);
ram_resource(dev, index++, base_kb, size_kb);
+ /* fsp_mem_base -> cbmem_top */
+ base_kb = top_of_ram / KiB;
+ size_kb = ((uintptr_t)cbmem_top() - top_of_ram) / KiB;
+ reserved_ram_resource(dev, index++, base_kb, size_kb);
+
/*
* FSP meomoy, CBMem regions are already added as reserved
* Add TSEG and MESEG Regions as reserved memory