diff options
author | Subrata Banik <subratabanik@google.com> | 2022-04-25 16:59:35 +0530 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-29 15:12:52 +0000 |
commit | c176fc2dfb2d313054d08813c644752eeb704efd (patch) | |
tree | c6ed673d48d719b28d08377ba63bb070bcbfb426 | |
parent | 09106f75f1c196d97fbc5fa998bfe1e602091266 (diff) |
soc/intel: Decouple HECI disabling interface from HECI disable Kconfig
This patch decouples HECI disabling interface a.k.a SMM or PCR or PMC
IPC etc. from DISABLE_HECI1_AT_PRE_BOOT kconfig as Intel ME BWG
recommends to disable the CSE PCI device while CSE is in
software temporary disable state.
BUG=b:228789015
TEST=Able to build google/redrix.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I66abc04d5e195515165a77b0166d004f17d029e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
-rw-r--r-- | src/soc/intel/alderlake/Kconfig | 2 | ||||
-rw-r--r-- | src/soc/intel/apollolake/Kconfig | 2 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 6 | ||||
-rw-r--r-- | src/soc/intel/skylake/Kconfig | 2 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 2 |
5 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 22fd9d7bb8..940e13faf1 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -88,7 +88,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 select SOC_INTEL_COMMON_BLOCK_SCS if SOC_INTEL_ALDERLAKE_PCH_N select SOC_INTEL_COMMON_BLOCK_HDA - select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC select SOC_INTEL_COMMON_BLOCK_IPU select SOC_INTEL_COMMON_BLOCK_IRQ select SOC_INTEL_COMMON_BLOCK_MEMINIT diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index b2235f8ec2..a6ff1d54e7 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -82,7 +82,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG select SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY select SOC_INTEL_COMMON_BLOCK_GRAPHICS - select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR if DISABLE_HECI1_AT_PRE_BOOT + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR select SOC_INTEL_COMMON_BLOCK_ITSS select SOC_INTEL_COMMON_BLOCK_I2C select SOC_INTEL_COMMON_BLOCK_LPC diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index ddb16198aa..f074a92e80 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -7,7 +7,7 @@ config SOC_INTEL_COFFEELAKE select FSP_USES_CB_STACK select HAVE_EXP_X86_64_SUPPORT select HAVE_INTEL_FSP_REPO - select HECI_DISABLE_USING_SMM if DISABLE_HECI1_AT_PRE_BOOT + select HECI_DISABLE_USING_SMM select SOC_INTEL_CONFIGURE_DDI_A_4_LANES config SOC_INTEL_WHISKEYLAKE @@ -15,7 +15,7 @@ config SOC_INTEL_WHISKEYLAKE select SOC_INTEL_CANNONLAKE_BASE select FSP_USES_CB_STACK select HAVE_INTEL_FSP_REPO - select HECI_DISABLE_USING_SMM if DISABLE_HECI1_AT_PRE_BOOT + select HECI_DISABLE_USING_SMM select SOC_INTEL_CONFIGURE_DDI_A_4_LANES config SOC_INTEL_COMETLAKE @@ -25,7 +25,7 @@ config SOC_INTEL_COMETLAKE select HAVE_INTEL_FSP_REPO select PMC_IPC_ACPI_INTERFACE if DISABLE_HECI1_AT_PRE_BOOT select SOC_INTEL_CONFIGURE_DDI_A_4_LANES - select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC select SOC_INTEL_COMMON_BASECODE if SOC_INTEL_CSE_LITE_SKU config SOC_INTEL_COMETLAKE_1 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 692a15b77f..520a5a0342 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -63,7 +63,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL select SOC_INTEL_COMMON_BLOCK_GSPI select SOC_INTEL_COMMON_BLOCK_HDA - select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR if DISABLE_HECI1_AT_PRE_BOOT + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SCS diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index ac175c4041..674e74413d 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -61,7 +61,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 select SOC_INTEL_COMMON_BLOCK_HDA - select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC select SOC_INTEL_COMMON_BLOCK_IRQ select SOC_INTEL_COMMON_BLOCK_MEMINIT select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3 |