diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-03-27 12:15:08 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2021-04-10 16:00:32 +0000 |
commit | c024c14790244becc5fee9cb122848128689b181 (patch) | |
tree | 61fe16b189c6cb09b34bae77a2ace73b7761f5d4 | |
parent | 11cabea60dacf083ad910545e8f83648cb14297b (diff) |
nb/intel/x4x: Correct sync DLL phase search
Bit 4 needs to be set then polled for after changing sync DLL taps.
Change-Id: I61b73998dec84710eec0d2561a6f4d88068e3373
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51872
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/northbridge/intel/x4x/raminit_ddr23.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 2389b5f899..1bfeaad5b0 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -862,7 +862,7 @@ static void program_dll(struct sysinfo *s) i++; for (; i < 16; i++) { MCHBAR8_AND_OR(0x1c8, ~0x1f, i); - MCHBAR8_OR(0x180, 0x4); + MCHBAR8_OR(0x180, 0x10); while (MCHBAR8(0x180) & 0x10) ; if (MCHBAR32(0x184) == 0) { |