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author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2020-02-07 21:29:30 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-09 19:25:44 +0000 |
commit | bfe0948f7d2f3df3c0f72e3e688527f0440c6591 (patch) | |
tree | de68e01f39768d5658c72e8612db4367334a74b0 | |
parent | 3fde8c997713488b79639bf0345ceb9ccb9dc923 (diff) |
mb/google/drallion: Tuning WWAN power sequence
Change GPP_C10 from pltrst to deep to meet the warmboot power sequence.
BUG=b:146935222
TEST=measure WWAN power sequence is meet spec
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ia1513ed38fbc1c99a10a5fa531a78cc92a3ebfc2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
-rw-r--r-- | src/mainboard/google/drallion/variants/drallion/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c index 1c864caff7..85de17346a 100644 --- a/src/mainboard/google/drallion/variants/drallion/gpio.c +++ b/src/mainboard/google/drallion/variants/drallion/gpio.c @@ -88,7 +88,7 @@ static const struct pad_config gpio_table[] = { /* SML0CLK */ PAD_NC(GPP_C3, NONE), /* SML0DATA */ PAD_NC(GPP_C4, NONE), /* SML0ALERT# */ PAD_CFG_GPI(GPP_C5, NONE, DEEP), -/* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 1, PLTRST), /* WWAN_FULL_PWR_EN */ +/* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 1, DEEP), /* WWAN_FULL_PWR_EN */ /* UART0_CTS# */ PAD_NC(GPP_C11, NONE), /* UART1_RXD */ PAD_NC(GPP_C12, NONE), /* UART1_TXD */ PAD_NC(GPP_C13, NONE), |