diff options
| author | Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> | 2021-11-19 13:18:22 +0900 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-22 14:47:50 +0000 |
| commit | be0722ac9145ac0203aca26165cbc9ee46b2b1b7 (patch) | |
| tree | 552a56c18898efd5711a9004346b56ad68c2ce9e | |
| parent | 69ed3ed5d8c944a90873c10e8ca3bc15042dda22 (diff) | |
mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs
Enable Acoustic noise mitigation for bugzzy and set slew rate to 1/8
which is calibrated value for the board.
BUG=b:207046230
BRANCH=dedede
TEST=build firmware to UPD and Acoustic noise test
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Change-Id: Id249a143efb9bce70f48fb466fed42e766a10937
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
| -rw-r--r-- | src/mainboard/google/dedede/variants/bugzzy/overridetree.cb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb index e1318a8e46..de1e46d0df 100644 --- a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb +++ b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb @@ -2,6 +2,12 @@ chip soc/intel/jasperlake # MIPI display panel register "DdiPortAConfig" = "2" # DdiPortMipiDsi + # Enable Acoustic noise mitigation and set slew rate to 1/8 + # Rest of the parameters are 0 by default. + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRate" = "SlewRateFastBy8" + register "FastPkgCRampDisable" = "1" + # Disable PCIe Root Port 8 (index 7) register "PcieRpEnable[7]" = "0" # Disable PCIe Clock Source 4 (index 3) |