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authorSukumar Ghorai <sukumar.ghorai@intel.com>2023-10-07 23:19:34 -0700
committerSubrata Banik <subratabanik@google.com>2023-10-18 06:23:57 +0000
commitbd9c562a9e0c6af65f5e798a17ba9a55892ef082 (patch)
tree6f3077c33809e4533f1b7c7b2dc79193d7bb1b0b
parent93ca15cc83ceb5f774a4ca9931cc7a3baea37bdb (diff)
acpi: Configure slp-s0 residency counter frequency in LPIT table
Intel platforms use Low Power Idle Table (LPIT) to enumerate platform Low Power Idle states. There are two types of low power residencies a) CPU PKG C10 - read via MSR (Function fixed hardware interface) b) Platform Controller Hub (PCH) SLP_S0 - read via memory mapped Ref. https://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf System sleep time (SLP_S0 signal asserted) is measured in ticks, varies in every platform and based on PMC clock. BUG=b:300440936 TEST=check kernel cpuidle sysfs for non-zero residency after s0ix cycle and both must match cat /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us cat /sys/kernel/debug/pmc_core/slp_s0_residency_usec Change-Id: I401dd4a09a67d81a9ea3a56cd22f1a681e2a9349 Signed-off-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78164 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/include/acpi/acpi.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index eae84a8071..6998edd66e 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -454,7 +454,12 @@ typedef struct acpi_lpi_desc_hdr {
} __packed acpi_lpi_desc_hdr_t;
#define ACPI_LPIT_CTR_FREQ_TSC 0
-#define ACPI_LPIT_SLP_S0_FREQ 0
+#if defined CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ && CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ != 0
+#define ACPI_LPIT_SLP_S0_FREQ CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ
+#else
+#define ACPI_LPIT_SLP_S0_FREQ 0
+#endif
+
/* LPIT: Native C-state instruction based LPI structure */
typedef struct acpi_lpi_desc_ncst {