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authorKarthikeyan Ramasubramanian <kramasub@google.com>2021-07-15 16:15:17 -0600
committerWerner Zeh <werner.zeh@siemens.com>2021-07-26 04:43:53 +0000
commitb3af9f8d2eced2f4a907d95134fbb45d0d0dc584 (patch)
treea6050a57f6ee1d448d0038be3de2a9ca0625aa96
parent589ac69850c49ed4e24963a8756f76ec78d503c9 (diff)
soc/amd/common/block/pm: Add support for Modern Standby event logging
Log the GPE and PM1 wake events into the event log using the SMI handler platform callback. BUG=b:186792595, b:186800045 TEST=Build and boot to OS in Guybrush. Ensure that the wake sources are logged into the event logs. 5 | 2021-07-15 16:26:43 | S0ix Enter 6 | 2021-07-15 16:26:49 | S0ix Exit 7 | 2021-07-15 16:26:49 | Wake Source | GPE # | 22 <- Trackpad 8 | 2021-07-15 16:27:07 | S0ix Enter 9 | 2021-07-15 16:27:13 | S0ix Exit 10 | 2021-07-15 16:27:13 | Wake Source | RTC Alarm | 0 25 | 2021-07-15 16:38:13 | S0ix Enter 26 | 2021-07-15 16:38:17 | S0ix Exit 27 | 2021-07-15 16:38:17 | Wake Source | GPE # | 5 <- Fingerprint Change-Id: Icec6fc03f4871cc46b32886575a7054bc289f4bf Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56363 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/soc/amd/common/block/acpi/Makefile.inc1
-rw-r--r--src/soc/amd/common/block/pm/Makefile.inc1
-rw-r--r--src/soc/amd/common/block/pm/chipset_state.c7
3 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/acpi/Makefile.inc b/src/soc/amd/common/block/acpi/Makefile.inc
index 41ce92bf80..95af8f78f3 100644
--- a/src/soc/amd/common/block/acpi/Makefile.inc
+++ b/src/soc/amd/common/block/acpi/Makefile.inc
@@ -15,5 +15,6 @@ ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_GPIO) += gpio.c
romstage-y += elog.c
ramstage-y += elog.c
+smm-y += elog.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_ACPI
diff --git a/src/soc/amd/common/block/pm/Makefile.inc b/src/soc/amd/common/block/pm/Makefile.inc
index f016a9db02..0baa11414c 100644
--- a/src/soc/amd/common/block/pm/Makefile.inc
+++ b/src/soc/amd/common/block/pm/Makefile.inc
@@ -1,3 +1,4 @@
bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM) += pmlib.c
romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c
+smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c
diff --git a/src/soc/amd/common/block/pm/chipset_state.c b/src/soc/amd/common/block/pm/chipset_state.c
index 3a4a0ba506..302ee60aba 100644
--- a/src/soc/amd/common/block/pm/chipset_state.c
+++ b/src/soc/amd/common/block/pm/chipset_state.c
@@ -4,6 +4,7 @@
#include <amdblocks/gpio_banks.h>
#include <amdblocks/pmlib.h>
#include <cbmem.h>
+#include <elog.h>
#include <string.h>
static struct chipset_power_state chipset_state;
@@ -14,6 +15,12 @@ void fill_chipset_state(void)
gpio_fill_wake_state(&chipset_state.gpio_state);
}
+void elog_gsmi_cb_platform_log_wake_source(void)
+{
+ fill_chipset_state();
+ acpi_log_events(&chipset_state);
+}
+
static void add_chipset_state_cbmem(int unused)
{
struct chipset_power_state *state;