diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-23 16:22:41 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-27 11:28:05 +0100 |
| commit | b06eaf76b5142977aa130c22f09a97ad08bef036 (patch) | |
| tree | f90d48f620b439274a0bd152767cc5b9fc8da87b | |
| parent | eaab6305beb587777248bf46a894050ed2a76b78 (diff) | |
vendorcode/amd/agesa: Use F15TN AGESA for F15RL
For the moment we make use of Trinity f15tn AGESA for Richland
f15rl support until we have properly worked out the discrepancies.
Adds RL-A1 Richland stepping cpuid to F15TnLogicalIdTables lookup.
We later wish to merge f15tn and f15rl support into the AGESA in
any case.
Change-Id: Ia9070d4e392ce7eb912771d1c7b3ef1440f8e8a8
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7559
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
| -rw-r--r-- | src/vendorcode/amd/agesa/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/Makefile.inc b/src/vendorcode/amd/agesa/Makefile.inc index 99356a6048..02d9063cde 100644 --- a/src/vendorcode/amd/agesa/Makefile.inc +++ b/src/vendorcode/amd/agesa/Makefile.inc @@ -3,4 +3,5 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY12) += f12 subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY14) += f14 subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15) += f15 subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) += f15tn +subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15_RL) += f15tn subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += f16kb diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c index 8157b575db..a9844ea9ab 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c @@ -83,6 +83,10 @@ GetF15TnLogicalIdAndRev ( STATIC CONST CPU_LOGICAL_ID_XLAT ROMDATA CpuF15TnLogicalIdAndRevArray[] = { { + 0x6131, + AMD_F15_TN_A1 // RL_A1 (Richland) + }, + { 0x6101, AMD_F15_TN_A1 }, |