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authorTao Xia <xiatao5@huaqin.corp-partner.google.com>2021-03-04 14:00:42 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-03-15 06:30:59 +0000
commitb01a4c57577cc8f2834cf5a1467552ca3157c80e (patch)
treeefe010642c3f9c1d10abcbc060ccbb13ac76ffab
parentf3a8bf13cbfc43e45f0bb6e451608a082b59f7bf (diff)
mb/google/dedede/var/sasukette: Add USB2 PHY parameters
This change adds fine-tuned USB2 PHY parameters for sasukette. BUG=180753635 TEST=Built and verified USB2 eye diagram test result Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com> Change-Id: I5612e7dcca15b340763dee1475e979ee551a2146 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51247 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: zanxi chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
-rw-r--r--src/mainboard/google/dedede/variants/sasukette/overridetree.cb25
1 files changed, 24 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/variants/sasukette/overridetree.cb b/src/mainboard/google/dedede/variants/sasukette/overridetree.cb
index fe7a2dd27e..ad9facde55 100644
--- a/src/mainboard/google/dedede/variants/sasukette/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/sasukette/overridetree.cb
@@ -49,7 +49,30 @@ chip soc/intel/jasperlake
}"
# USB Port Configuration
- register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
+ register "usb2_ports[2]" = "{
+ .enable = 1,
+ .ocpin = OC_SKIP,
+ .tx_bias = USB2_BIAS_0MV,
+ .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
+ .pre_emp_bias = USB2_BIAS_28P15MV,
+ .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
+ }" # Type-A
+ register "usb2_ports[3]" = "{
+ .enable = 1,
+ .ocpin = OC_SKIP,
+ .tx_bias = USB2_BIAS_0MV,
+ .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
+ .pre_emp_bias = USB2_BIAS_16P9MV,
+ .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
+ }" # WWAN
+ register "usb2_ports[5]" = "{
+ .enable = 1,
+ .ocpin = OC_SKIP,
+ .tx_bias = USB2_BIAS_0MV,
+ .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
+ .pre_emp_bias = USB2_BIAS_28P15MV,
+ .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
+ }" # Camera
device domain 0 on
device pci 14.0 on