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authorAlexandru M Stan <amstan@chromium.org>2015-08-17 17:32:06 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-08-28 06:44:42 +0000
commitaffb88b27140bfcdaf2a8cbd44b9ff90d6dee8d8 (patch)
tree30bbb7c7c18b2bd1cf951519fd2aeb250f4bb0de
parentbedbdc4566097d599f296dbe741d7ff70bba6236 (diff)
veyron_rialto: Turn on all leds
Without this, the leds would be stuck to whatever the pullup/down states the pins come with on rk3288. Ready2_LED, an orange led, is one of the leds in this state. This might confuse some users thinking there's an error. Turn all of them on instead. Later on depthcharge will use the same LEDs to indicate dev mode status. BUG=chrome-os-partner:44274 BRANCH=master TEST=Boot firmware without anything else, note all leds on Change-Id: I5cf19aabd2a59a61699ef491ae11424cf5a0c874 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: 2e1a332a5653fb76bbf8fe624274ec64d2b443a5 Original-Change-Id: I4c4e8940dd9cf1ac0301ac00bfc5992ba16e1589 Original-Signed-off-by: Alexandru M Stan <amstan@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/294065 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/11398 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/mainboard/google/veyron_rialto/bootblock.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/veyron_rialto/bootblock.c b/src/mainboard/google/veyron_rialto/bootblock.c
index 849bc95959..38ae277897 100644
--- a/src/mainboard/google/veyron_rialto/bootblock.c
+++ b/src/mainboard/google/veyron_rialto/bootblock.c
@@ -48,6 +48,12 @@ void bootblock_mainboard_init(void)
if (rkclk_was_watchdog_reset())
reboot_from_watchdog();
+ /* Turn on all leds */
+ gpio_output(GPIO(7, A, 0), 1); /* LED_READY */
+ gpio_output(GPIO(7, B, 5), 1); /* Ready2_LED */
+ gpio_output(GPIO(7, B, 3), 1); /* LED_SYNCING */
+ gpio_output(GPIO(7, B, 7), 1); /* LED_ERROR */
+
/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);