diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-01-31 23:15:25 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-02-02 06:59:31 +0000 |
| commit | abac030662b8aff500299b96972b6063ea755ab9 (patch) | |
| tree | 4ccef63e222343930467ba993682b2ae1c2f4968 | |
| parent | da2827779c81ec1b0038996027d9d506d11a35f0 (diff) | |
mb/google/brya: Lock TPM IRQ pin in brask and brya baseboards
This applies a configuration lock to the TPM IRQ pins for all brya
and brask variants.
BUG=b:208827718
TEST=cat /sys/kernel/debug/pinctrl/INTC1055\:00/pins suggests
GSC_PCH_INT_ODL is locked.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Icfc251152278c59f9a94b84fcd8c6d36c26bff62
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brask/gpio.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brya/gpio.c | 3 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index 40d73ebb79..22b2c702e3 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -29,7 +29,7 @@ static const struct pad_config gpio_table[] = { /* A12 : SATAXPCIE1 ==> CLKREQ_9B */ PAD_NC(GPP_A12, NONE), /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ - PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), + PAD_CFG_GPI_APIC_LOCK(GPP_A13, NONE, LEVEL, INVERT, LOCK_CONFIG), /* A14 : USB_OC1# ==> USB_C1_OC_ODL */ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1), /* A15 : USB_OC2# ==> USB_C2_OC_ODL */ diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c index ffc549ece7..fffbbc835c 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c @@ -29,7 +29,7 @@ static const struct pad_config gpio_table[] = { /* A12 : SATAXPCIE1 ==> EN_PP3300_WWAN */ PAD_CFG_GPO(GPP_A12, 1, DEEP), /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ - PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), + PAD_CFG_GPI_APIC_LOCK(GPP_A13, NONE, LEVEL, INVERT, LOCK_CONFIG), /* A14 : USB_OC1# ==> USB_C1_OC_ODL */ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1), /* A15 : USB_OC2# ==> USB_C2_OC_ODL */ @@ -458,7 +458,6 @@ const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) } static struct gpio_lock_config lockable_brya_gpios[] = { - { GPP_A13, GPIO_LOCK_CONFIG }, /* GSC_PCH_INT_ODL */ { GPP_E15, GPIO_LOCK_CONFIG }, /* PCH_WP_OD */ { GPP_F11, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CLK_FPMCU_R */ { GPP_F13, GPIO_LOCK_CONFIG }, /* GSPI_PCH_D1_FPMCU_D0 */ |