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authorFelix Held <felix-coreboot@felixheld.de>2021-08-04 01:57:38 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-09-08 00:16:53 +0000
commitaa9ad0544908761248e9ea9bd5d44e3d0d6b90ea (patch)
tree2c7343e5d21ef9be4a6ccee2a2f4f2d66558b948
parent85e733f0ef010e0bdeaab8e6e5790763844f805e (diff)
soc/amd/common/block/gpio_banks: factor out gpio_mux_ptr
This aligns the GPIO MUX access more with the GPIO control register access and will facilitate adding support for the remote GPIO bank. Also change the GPIO number argument type to gpio_t. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4054656c5cc23ea942e8dd370fbbffca304755d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56787 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/soc/amd/common/block/gpio_banks/gpio.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c
index f32558aa59..7f5b4b6b94 100644
--- a/src/soc/amd/common/block/gpio_banks/gpio.c
+++ b/src/soc/amd/common/block/gpio_banks/gpio.c
@@ -31,14 +31,19 @@ static inline void gpio_write32(gpio_t gpio_num, uint32_t value)
write32(gpio_ctrl_ptr(gpio_num), value);
}
-static inline uint8_t iomux_read8(uint8_t reg)
+static inline void *gpio_mux_ptr(gpio_t gpio_num)
{
- return read8(acpimmio_iomux + reg);
+ return acpimmio_iomux + gpio_num;
}
-static inline void iomux_write8(uint8_t reg, uint8_t value)
+static inline uint8_t iomux_read8(gpio_t gpio_num)
{
- write8(acpimmio_iomux + reg, value);
+ return read8(gpio_mux_ptr(gpio_num));
+}
+
+static inline void iomux_write8(gpio_t gpio_num, uint8_t value)
+{
+ write8(gpio_mux_ptr(gpio_num), value);
}
static uint8_t get_gpio_mux(gpio_t gpio)