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authorTinghan Shen <tinghan.shen@mediatek.com>2022-10-11 13:42:44 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-10-14 16:02:29 +0000
commita9e595770f4ab4f8142fd88f157758dbaf085daa (patch)
tree36ff742c01b093402e899e8d6800566ae7cd5cca
parent55a1ba30437c546763dee2476b0f0fbccc3530c3 (diff)
soc/mediatek/mt8186: Inititalize ADSP
To use SOF correctly, we need to initialize ADSP in coreboot stage. TEST=SOF driver is functional. BUG=b:204229221 Change-Id: I45db587252ccdcdf75e0be2029743034a79925c5 Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68289 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/mediatek/mt8186/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8186/adsp.c11
-rw-r--r--src/soc/mediatek/mt8186/include/soc/addressmap.h1
-rw-r--r--src/soc/mediatek/mt8186/include/soc/adsp.h18
-rw-r--r--src/soc/mediatek/mt8186/soc.c8
5 files changed, 39 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc
index 724f80fb11..cd207773ac 100644
--- a/src/soc/mediatek/mt8186/Makefile.inc
+++ b/src/soc/mediatek/mt8186/Makefile.inc
@@ -27,6 +27,7 @@ romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c
romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
+ramstage-y += adsp.c
ramstage-y += ../common/auxadc.c
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
ramstage-y += ../common/ddp.c ddp.c
diff --git a/src/soc/mediatek/mt8186/adsp.c b/src/soc/mediatek/mt8186/adsp.c
new file mode 100644
index 0000000000..11df47009e
--- /dev/null
+++ b/src/soc/mediatek/mt8186/adsp.c
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/adsp.h>
+
+void mtk_adsp_init(void)
+{
+ /* [0] CORE_CLK_EN, [1] COREDBG_EN, [3] TIMER_EN, [4] DMA_EN, [5] UART_EN */
+ setbits32(&mt8186_audiodsp->audiodsp_adsp_ck_en, 0x0000003B);
+}
diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h
index 0aaeb9b666..d19a8db17e 100644
--- a/src/soc/mediatek/mt8186/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h
@@ -50,6 +50,7 @@ enum {
DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000,
SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
SSPM_CFG_BASE = IO_PHYS + 0x00440000,
+ AUDIODSP_BASE = IO_PHYS + 0x00680000,
SFLASH_REG_BASE = IO_PHYS + 0x01000000,
AUXADC_BASE = IO_PHYS + 0x01001000,
UART0_BASE = IO_PHYS + 0x01002000,
diff --git a/src/soc/mediatek/mt8186/include/soc/adsp.h b/src/soc/mediatek/mt8186/include/soc/adsp.h
new file mode 100644
index 0000000000..03916964b9
--- /dev/null
+++ b/src/soc/mediatek/mt8186/include/soc/adsp.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_MT8186_ADSP_H
+#define SOC_MEDIATEK_MT8186_ADSP_H
+
+#include <soc/addressmap.h>
+
+struct mt8186_audiodsp_regs {
+ u32 reserved1[1024];
+ u32 audiodsp_adsp_ck_en;
+};
+check_member(mt8186_audiodsp_regs, audiodsp_adsp_ck_en, 0x1000);
+
+static struct mt8186_audiodsp_regs *const mt8186_audiodsp = (void *)AUDIODSP_BASE;
+
+void mtk_adsp_init(void);
+
+#endif
diff --git a/src/soc/mediatek/mt8186/soc.c b/src/soc/mediatek/mt8186/soc.c
index d2e7a1e03e..a55e2ee2cb 100644
--- a/src/soc/mediatek/mt8186/soc.c
+++ b/src/soc/mediatek/mt8186/soc.c
@@ -2,10 +2,12 @@
#include <bootmem.h>
#include <device/device.h>
+#include <soc/adsp.h>
#include <soc/devapc.h>
#include <soc/dfd.h>
#include <soc/emi.h>
#include <soc/mmu_operations.h>
+#include <soc/mtcmos.h>
#include <soc/sspm.h>
#include <symbols.h>
@@ -24,6 +26,12 @@ static void soc_init(struct device *dev)
{
mtk_mmu_disable_l2c_sram();
sspm_init();
+
+ /* ADSP is required for all MT8186 projects, so it's initialized in soc.c */
+ mtcmos_adsp_power_on();
+ mtcmos_protect_adsp_bus();
+ mtk_adsp_init();
+
dapc_init();
if (CONFIG(MTK_DFD))