summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-01-23 20:20:56 -0600
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-01-28 22:11:48 +0100
commita6f669e183e1a5bac244118d9196d926c040c8db (patch)
tree0d57c338753404deb389ea05b4fdf7cb461d4552
parent7f3ae39640adabbd2288fdeff20b04c55a3a3e9f (diff)
amd/amdfam10: Allocate the lower DRAM region up to TOM
This fixes the resource allocator locating the PCI register space below 0xe0000000 thereby causing corruption with more than ~3.5GB physical RAM on AMD Family 10h systems. Change-Id: I66d1bfa1e977a6b492c1909079087a801c7e6a3a Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/8261 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 51cfee7186..84f255378e 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -677,6 +677,9 @@ static void amdfam10_domain_read_resources(device_t dev)
res->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256;
res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+
+ /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */
+ ram_resource(dev, 7, 0, rdmsr(TOP_MEM).lo >> 10);
#endif
}