diff options
| author | Werner Zeh <werner.zeh@siemens.com> | 2021-05-31 07:15:36 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-04 12:39:57 +0000 |
| commit | a67bda339e6f6bf301976c575901dcab0a1f5ffc (patch) | |
| tree | 043edc5e1398451ed26afcc2eb6accdf722b74c7 | |
| parent | 1e02ad3f5a14c6f6a9c34bf2e3ca0eed8f34af1d (diff) | |
mb/siemens/mc_apl{1,2,3,5,6}: Provide I2C timings for 400 kHz
The I2C bus at which the external RTC is attached to is operated at
standard speed (100 kHz) at coreboot runtime. The OS can choose to run it
at fast speed since it uses its own driver and controller setup.
Report additional bus timings for fast mode so that OS can do it right.
Change-Id: I82e11e5dde8ad1047713f105c5a6d020eebf1ffd
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55089
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
5 files changed, 35 insertions, 5 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb index b7590fa724..20d44bb100 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb @@ -49,7 +49,13 @@ chip soc/intel/apollolake .speed = I2C_SPEED_STANDARD, .rise_time_ns = 160, .fall_time_ns = 110, - .data_hold_time_ns = 300 + .data_hold_time_ns = 300, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_hcnt = 0x58, + .scl_lcnt = 0xcf, + .sda_hold = 0x28 + }, }, }" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index 336d6c4837..06f4c050bb 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -47,7 +47,13 @@ chip soc/intel/apollolake .speed = I2C_SPEED_STANDARD, .rise_time_ns = 60, .fall_time_ns = 20, - .data_hold_time_ns = 300 + .data_hold_time_ns = 300, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_hcnt = 0x68, + .scl_lcnt = 0xd4, + .sda_hold = 0x28 + }, }, }" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb index 635ff3ffda..45cfd850f8 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb @@ -44,7 +44,13 @@ chip soc/intel/apollolake .speed = I2C_SPEED_STANDARD, .rise_time_ns = 40, .fall_time_ns = 10, - .data_hold_time_ns = 300 + .data_hold_time_ns = 300, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_hcnt = 0x68, + .scl_lcnt = 0xd1, + .sda_hold = 0x28 + }, }, }" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index 48b4ad8d71..2500e08670 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -47,7 +47,13 @@ chip soc/intel/apollolake .speed = I2C_SPEED_STANDARD, .rise_time_ns = 160, .fall_time_ns = 110, - .data_hold_time_ns = 300 + .data_hold_time_ns = 300, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_hcnt = 0x5b, + .scl_lcnt = 0xce, + .sda_hold = 0x28 + }, }, }" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index e2a3ea093e..e058fdeb64 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -18,7 +18,13 @@ chip soc/intel/apollolake .speed = I2C_SPEED_STANDARD, .rise_time_ns = 40, .fall_time_ns = 10, - .data_hold_time_ns = 300 + .data_hold_time_ns = 300, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_hcnt = 0x68, + .scl_lcnt = 0xd1, + .sda_hold = 0x28 + }, } }" |