diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2019-12-27 10:04:30 +0300 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2020-01-10 14:45:23 +0000 |
commit | 9e81aacd9c8c840e1b881b09844e90774c7441cd (patch) | |
tree | 189b8861a68d62657cf87ccf9ccf64e06c40028b | |
parent | d548edde4b8cb67a669cf621f506773d0a3afc73 (diff) |
mb/lenovo/x1_1st_gen/devicetree: Use subsystemid inheritance
PCI ID was changed according to the reports from Linux Hardware Project:
https://github.com/linuxhw/LsPCI/tree/master/Notebook/Lenovo/ThinkPad
Change-Id: I67b81a4c9378c13d557e5d9c5d3797cebeeff5a1
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r-- | src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb | 52 |
1 files changed, 14 insertions, 38 deletions
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb index 288870f81d..ded920cb07 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb +++ b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb @@ -34,13 +34,11 @@ chip northbridge/intel/sandybridge register "pci_mmio_size" = "1024" device domain 0 on - device pci 00.0 on - subsystemid 0x17aa 0x21fa - end # host bridge + subsystemid 0x17aa 0x21f9 inherit + + device pci 00.0 on end # host bridge device pci 01.0 off end # PCIe Bridge for discrete graphics - device pci 02.0 on - subsystemid 0x17aa 0x21fa - end # vga controller + device pci 02.0 on end # vga controller chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -74,50 +72,33 @@ chip northbridge/intel/sandybridge register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device pci 14.0 on - subsystemid 0x17aa 0x21f9 - end # USB 3.0 Controller - device pci 16.0 on - subsystemid 0x17aa 0x21f9 - end # Management Engine Interface 1 + device pci 14.0 on end # USB 3.0 Controller + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT device pci 19.0 off end # Intel Gigabit Ethernet - device pci 1a.0 on - subsystemid 0x17aa 0x21f9 - end # USB2 EHCI #2 - device pci 1b.0 on - subsystemid 0x17aa 0x21f9 - end # High Definition Audio + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 on end # High Definition Audio device pci 1c.0 on - subsystemid 0x17aa 0x21f9 chip drivers/ricoh/rce822 register "sdwppol" = "0" register "disable_mask" = "0x87" - device pci 00.0 on - subsystemid 0x17aa 0x21f3 - end + device pci 00.0 on end end end # PCIe Port #1 - device pci 1c.1 on - subsystemid 0x17aa 0x21f9 - end # PCIe Port #2 + device pci 1c.1 on end # PCIe Port #2 device pci 1c.2 off end # PCIe Port #3 device pci 1c.3 off end # PCIe Port #4 device pci 1c.4 off end # PCIe Port #5 device pci 1c.5 off end # PCIe Port #6 device pci 1c.6 off end # PCIe Port #7 device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on - subsystemid 0x17aa 0x21f9 - end # USB2 EHCI #1 + device pci 1d.0 on end # USB2 EHCI #1 device pci 1e.0 off end # PCI bridge device pci 1f.0 on #LPC bridge - subsystemid 0x17aa 0x21f9 chip ec/lenovo/pmh7 - device pnp ff.1 on # dummy - end + device pnp ff.1 on end # dummy register "backlight_enable" = "0x01" register "dock_event_enable" = "0x01" end @@ -162,11 +143,8 @@ chip northbridge/intel/sandybridge register "wwan_gpio_lvl" = "0" end end # LPC bridge - device pci 1f.2 on - subsystemid 0x17aa 0x21f9 - end # SATA Controller 1 + device pci 1f.2 on end # SATA Controller 1 device pci 1f.3 on - subsystemid 0x17aa 0x21f9 # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -180,9 +158,7 @@ chip northbridge/intel/sandybridge end end # SMBus device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 on - subsystemid 0x17aa 0x21f9 - end # Thermal + device pci 1f.6 on end # Thermal end end end |