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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-10-26 15:51:57 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-10-26 15:51:57 +0000
commit9d4212fff2e3a66b3a319a5cf094df539cf7b599 (patch)
tree6cb53df2964de8ca3e657bf2f6539b3d23b85e4f
parentf3e8542cc498da4a18f66cb7894afa6a49f977c2 (diff)
Move bcm5785_enable_rom.c include to where it's used.
Right now, it breaks the build of bootblock enabled boards with that chipset. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/broadcom/blast/romstage.c1
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c1
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c1
-rw-r--r--src/mainboard/msi/ms9185/romstage.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c1
5 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c
index 5a9b3ebeba..474ca19c6e 100644
--- a/src/mainboard/broadcom/blast/romstage.c
+++ b/src/mainboard/broadcom/blast/romstage.c
@@ -17,6 +17,7 @@
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c"
+#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c"
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 8019361b24..b5efc77256 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -57,6 +57,7 @@
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c"
+#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c"
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index b1267167bc..e4188987a8 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -49,6 +49,7 @@
#include <console/console.h>
#include <cpu/amd/model_10xxx_rev.h>
#include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c"
+#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c"
#include "northbridge/amd/amdfam10/raminit.h"
#include "northbridge/amd/amdfam10/amdfam10.h"
#include <lib.h>
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index 9f84f44864..801859415c 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -49,6 +49,7 @@
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c"
+#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c"
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
index b45ef01d1b..e3edfd8635 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
@@ -20,7 +20,6 @@
#include <reset.h>
#include "bcm5785.h"
-#include "bcm5785_enable_rom.c"
static void bcm5785_enable_lpc(void)
{