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authorEric Lai <eric_lai@quanta.corp-partner.google.com>2022-06-16 14:35:33 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-06-17 14:39:07 +0000
commit99edff944c4e2a4c18fdf104138a10e77a03c324 (patch)
tree4c3c2a1123bda6f2c3d09df4d18b87ad6cf3fcfd
parent471c239ffe69c68575a640e9d29f2df74ea613bc (diff)
soc/intel/denverton_ns: Define macro TOTAL_PADS
Define total GPIO pins as TOTAL_PADS. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I220b6f1a968667a68c30c7287ab5af1912959e3e Reviewed-on: https://review.coreboot.org/c/coreboot/+/65166 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
-rw-r--r--src/soc/intel/denverton_ns/include/soc/gpio_defs.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/gpio_defs.h b/src/soc/intel/denverton_ns/include/soc/gpio_defs.h
index 5c7ecde12d..4bcafaa520 100644
--- a/src/soc/intel/denverton_ns/include/soc/gpio_defs.h
+++ b/src/soc/intel/denverton_ns/include/soc/gpio_defs.h
@@ -16,6 +16,9 @@
#define V_PCH_GPIO_SC1_PAD_MAX 42
#define V_PCH_GPIO_GROUP_MAX 4
+#define TOTAL_PADS (V_PCH_GPIO_NC_PAD_MAX + V_PCH_GPIO_SC_DFX_PAD_MAX\
+ + V_PCH_GPIO_SC0_PAD_MAX + V_PCH_GPIO_SC1_PAD_MAX)
+
//
// GPIO Community 0 Private Configuration Registers
//