diff options
| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-06-30 12:49:50 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-30 21:33:36 +0200 |
| commit | 961e8a46af0a75063db012997c64d342b0b193f3 (patch) | |
| tree | 51b357719e51c8978a13ca1266be3d8bc0eac3d6 | |
| parent | 03decc0c5e988ce9af20ebe1e3e52e495251d0a5 (diff) | |
samsung/lumpy: implement get_write_protect_state
Current vboot wants that function.
Change-Id: I08590739112a7fcce7a983b6d77ff500692ef7d3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10725
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/mainboard/samsung/lumpy/chromeos.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index 04ae5ffd16..8b772be06c 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -52,9 +52,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: GPIO24 = KBC3_SPI_WP# */ gpios->gpios[0].port = GPIO_SPI_WP; gpios->gpios[0].polarity = ACTIVE_HIGH; - gpios->gpios[0].value = - (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 2)), - SATA_SP) >> FLAG_SPI_WP) & 1; + gpios->gpios[0].value = get_write_protect_state(); strncpy((char *)gpios->gpios[0].name,"write protect", GPIO_MAX_NAME_LENGTH); @@ -89,6 +87,17 @@ void fill_lb_gpios(struct lb_gpios *gpios) } #endif +int get_write_protect_state(void) +{ + device_t dev; +#ifdef __PRE_RAM__ + dev = PCI_DEV(0, 0x1f, 2); +#else + dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); +#endif + return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; +} + int get_developer_mode_switch(void) { device_t dev; |