summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKeith Hui <buurin@gmail.com>2023-03-13 09:42:15 -0400
committerFelix Held <felix-coreboot@felixheld.de>2023-03-24 14:01:21 +0000
commit94927888c7740a602f363c402da4b10282f0e616 (patch)
treea451d712d51c429d3239a03669d2540db68ff833
parent6ba67ab2db8f7e95c9a28beeea2061b55e5b64d1 (diff)
nb/intel/i440bx: Die with standard POST code on fatal conditions
When encountering really incompatible memory configurations, post a standard POST_RAM_FAILURE code when dying. Gone are the "HALT" messages that no longer serve any good purpose, instead fatal messages are edited to always end with "!" to make them stand out even with loglevel prefix off. Change-Id: Ie1b9e5a0415e4c64b1f4e935689263f62db012b2 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73886 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/northbridge/intel/i440bx/raminit.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index b3f8780e40..80ccaed12b 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -8,6 +8,7 @@
#include <device/pci_def.h>
#include <device/smbus_host.h>
#include <console/console.h>
+#include <commonlib/console/post_codes.h>
#include <timestamp.h>
#include "i440bx.h"
#include "raminit.h"
@@ -763,8 +764,8 @@ static void set_dram_row_attributes(void)
PRINT_DEBUG("Found DIMM in slot %d\n", i);
if (edo && sd) {
- printk(BIOS_ERR, "Mixing EDO/SDRAM unsupported!\n");
- die("HALT\n");
+ die_with_post_code(POST_RAM_FAILURE,
+ "Mixing EDO/SDRAM unsupported!\n");
}
/* "DRA" is our RPS for the two rows on this DIMM. */
@@ -868,12 +869,12 @@ static void set_dram_row_attributes(void)
if (col == 4)
bpr |= 0xc0;
} else {
- printk(BIOS_ERR, "# of banks of DIMM unsupported!\n");
- die("HALT\n");
+ die_with_post_code(POST_RAM_FAILURE,
+ "# of banks of DIMM unsupported!\n");
}
if (dra == -1) {
- printk(BIOS_ERR, "Page size not supported\n");
- die("HALT\n");
+ die_with_post_code(POST_RAM_FAILURE,
+ "Page size not supported!\n");
}
/*
@@ -883,9 +884,9 @@ static void set_dram_row_attributes(void)
*/
struct dimm_size sz = spd_get_dimm_size(device);
if ((sz.side1 < 8)) {
- printk(BIOS_ERR, "DIMMs smaller than 8MB per side\n"
- "are not supported on this NB.\n");
- die("HALT\n");
+ die_with_post_code(POST_RAM_FAILURE,
+ "DIMMs smaller than 8MB per side "
+ "are not supported!\n");
}
/* Divide size by 8 to set up the DRB registers. */