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authorEric Lai <eric_lai@quanta.corp-partner.google.com>2022-07-27 11:47:43 +0800
committerPaul Fagerburg <pfagerburg@chromium.org>2022-07-28 19:59:54 +0000
commit9473154497a5ab58c33690f86583e7afca7a5085 (patch)
treea8fe278e597059ef97456bc1c2423cb658cb8f6d
parent5219ee160eb79f383321c062da388f65718c9946 (diff)
mb/google/brya/var/ghost: Correct CNVi pins
GPP_F0 to GPP_F4 is for CNVi and should be NF1. GPP_F5 is for CNVi CLK_REQ, and should be NF3 CRF_XTAL_CLKREQ. BUG=b:240006200 BRANCH=firmware-brya-14505.B TEST=CNVi wifi can get probed in kernel. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ice3fde3a457f6f5c058c0a7d3ca2e63775bda96c Reviewed-on: https://review.coreboot.org/c/coreboot/+/66175 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
-rw-r--r--src/mainboard/google/brya/variants/ghost/gpio.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/google/brya/variants/ghost/gpio.c b/src/mainboard/google/brya/variants/ghost/gpio.c
index e6a80f0fb5..96a270d893 100644
--- a/src/mainboard/google/brya/variants/ghost/gpio.c
+++ b/src/mainboard/google/brya/variants/ghost/gpio.c
@@ -215,18 +215,18 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E22, NONE),
/* GPP_E23 : net NC is not present in the given design */
PAD_NC(GPP_E23, NONE),
- /* GPP_F0 : CNV_BRI_DT_STRAP ==> Component NC */
- PAD_NC(GPP_F0, NONE),
- /* GPP_F1 : No heuristic was found useful */
- PAD_NC(GPP_F1, NONE),
- /* GPP_F2 : CNV_RGI_DT_STRAP ==> Component NC */
- PAD_NC(GPP_F2, NONE),
- /* GPP_F3 : No heuristic was found useful */
- PAD_NC(GPP_F3, NONE),
- /* GPP_F4 : No heuristic was found useful */
- PAD_NC(GPP_F4, NONE),
+ /* F0 : CNV_BRI_DT ==> CNV_BRI_DT_STRAP */
+ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
+ /* F1 : CNV_BRI_RSP ==> CNV_BRI_RSP */
+ PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
+ /* F2 : CNV_RGI_DT ==> CNV_RGI_DT_STRAP */
+ PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
+ /* F3 : CNV_RGI_RSP ==> CNV_RGI_RSP */
+ PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
+ /* F4 : CNV_RF_RESET# ==> CNV_RF_RST_L */
+ PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
/* GPP_F5 : [NF2: MODEM_CLKREQ NF3: CRF_XTAL_CLKREQ NF6: USB_C_GPP_F5] ==> CNV_CLKREQ0 */
- PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
+ PAD_CFG_NF(GPP_F5, NONE, DEEP, NF3),
/* GPP_F6 : net NC is not present in the given design */
PAD_NC(GPP_F6, NONE),
/* GPP_F7 : GPP_F7_STRAP ==> Component NC */