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authorMartin Roth <martin.roth@se-eng.com>2013-01-16 17:50:32 -0700
committerMartin Roth <martin.roth@se-eng.com>2013-01-21 18:53:51 +0100
commit931df3a96bce9e3bc6f0d1058c301c49bee63747 (patch)
tree34a70be63fa4cf7e82237fe707d15c5026c1dfb9
parentc89d3daf32476f02b0bea7dc84572adfad55fc3d (diff)
F15tn / Hudson: Change SATA NumOfPorts register setting
The Number of Ports register says that it should be set to the maximum number of ports supported by the silicon. AGESA was setting this to be the number of enabled ports. If port 1 was the only port with a drive, this value got set to 0, indicating 1 port. This causes SeaBIOS to only look at port 0 and quit, never finding the drive on port 1. Dave Frodin: I also verified that this patch allows a SATA drive plugged into port 2 to be detected without a device in port 1. Change-Id: I5d49e351864449520e3957bbb07edf0f3ec2fd47 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/2165 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-by: Marc Jones <marcj303@gmail.com>
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c25
1 files changed, 7 insertions, 18 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c
index d3eb26308d..bf97f8bc88 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c
@@ -83,7 +83,6 @@
* D E F I N I T I O N S A N D M A C R O S
*----------------------------------------------------------------------------------------
*/
-UINT8 NumOfSataPorts = 8;
/**
* FchSataGpioInitial - Sata GPIO function Procedure
@@ -581,7 +580,6 @@ FchShutdownUnconnectedSataPortClock (
{
UINT8 PortNumByte;
UINT8 PortSataStatusByte;
- UINT8 NumOfPorts;
UINT8 FchSataClkAutoOff;
FCH_DATA_BLOCK *LocalCfgPtr;
AMD_CONFIG_PARAMS *StdHeader;
@@ -590,7 +588,6 @@ FchShutdownUnconnectedSataPortClock (
StdHeader = LocalCfgPtr->StdHeader;
FchSataClkAutoOff = (UINT8) LocalCfgPtr->Sata.SataClkAutoOff;
- NumOfPorts = 0;
//
// Enable SATA auto clock control by default
//
@@ -606,28 +603,20 @@ FchShutdownUnconnectedSataPortClock (
}
} ///end of for (PortNumByte=0;PortNumByte<6;PortNumByte++)
- ReadMem (Bar5 + 0x0C, AccessWidth8, &PortSataStatusByte);
-
//
+ //Set the Ports Implemented register
//if all ports are in disabled state, report at least one port
//
+ ReadMem (Bar5 + 0x0C, AccessWidth8, &PortSataStatusByte);
if ( (PortSataStatusByte & 0xFF) == 0) {
RwMem (Bar5 + 0x0C, AccessWidth8, (UINT32) ~(0xFF), 01);
}
- ReadMem (Bar5 + 0x0C, AccessWidth8, &PortSataStatusByte);
-
- for (PortNumByte = 0; PortNumByte < MAX_SATA_PORTS; PortNumByte ++) {
- if (PortSataStatusByte & (1 << PortNumByte)) {
- NumOfPorts++;
- }
- }
-
- if ( NumOfPorts == 0) {
- NumOfPorts = 0x01;
- }
-
- RwMem (Bar5 + 0x00, AccessWidth8, 0xE0, NumOfPorts - 1);
+ //
+ // Number of Ports (NP): 0’s based value indicating the maximum number
+ // of ports supported by the HBA silicon.
+ //
+ RwMem (Bar5 + 0x00, AccessWidth8, 0xE0, MAX_SATA_PORTS - 1);
}
/**