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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-05-26 04:03:24 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-31 21:16:39 +0200
commit9068788a8f0c96a5153fcd4e5ed80eac80b060c6 (patch)
tree7196cf65855fd158c28a19d53413142a6feedb17
parent3c3e34d69fe4b185d4c0b698dfc6fcbf11b50dbb (diff)
superio/winbond/w83627ehg: Depreciate romstage component
Part 1/2: These are actually not necessary if Super I/O support is properly utilized. Change-Id: I39b621e582f8d0762276d29492c91dce500f0665 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5870 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c3
-rw-r--r--src/superio/winbond/w83627ehg/Makefile.inc1
-rw-r--r--src/superio/winbond/w83627ehg/early_init.c38
-rw-r--r--src/superio/winbond/w83627ehg/w83627ehg.h5
4 files changed, 2 insertions, 45 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index d411354428..df78a0c622 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -36,6 +36,7 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
+#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627ehg/w83627ehg.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c"
@@ -119,11 +120,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
pnp_enter_ext_func_mode(SERIAL_DEV);
pnp_write_config(SERIAL_DEV, 0x24, 0);
- w83627ehg_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE);
pnp_exit_ext_func_mode(SERIAL_DEV);
setup_mb_resource_map();
+ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
/* Halt if there was a built in self test failure */
diff --git a/src/superio/winbond/w83627ehg/Makefile.inc b/src/superio/winbond/w83627ehg/Makefile.inc
index 19f069f125..6914411d85 100644
--- a/src/superio/winbond/w83627ehg/Makefile.inc
+++ b/src/superio/winbond/w83627ehg/Makefile.inc
@@ -19,6 +19,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-romstage-$(CONFIG_SUPERIO_WINBOND_W83627EHG) += early_init.c
romstage-$(CONFIG_SUPERIO_WINBOND_W83627EHG) += early_serial.c
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627EHG) += superio.c
diff --git a/src/superio/winbond/w83627ehg/early_init.c b/src/superio/winbond/w83627ehg/early_init.c
deleted file mode 100644
index d767aa03a4..0000000000
--- a/src/superio/winbond/w83627ehg/early_init.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/io.h>
-#include <device/pnp.h>
-#include "w83627ehg.h"
-
-void w83627ehg_disable_dev(device_t dev)
-{
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
-}
-
-void w83627ehg_enable_dev(device_t dev, u16 iobase)
-{
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
-}
diff --git a/src/superio/winbond/w83627ehg/w83627ehg.h b/src/superio/winbond/w83627ehg/w83627ehg.h
index 02041fc5f9..221de7b889 100644
--- a/src/superio/winbond/w83627ehg/w83627ehg.h
+++ b/src/superio/winbond/w83627ehg/w83627ehg.h
@@ -54,11 +54,6 @@
#define W83627EHG_GPIO4 ((2 << 8) | W83627EHG_GPIO_SUSLED_V)
#define W83627EHG_GPIO5 ((3 << 8) | W83627EHG_GPIO_SUSLED_V)
-#if defined(__PRE_RAM__)
-void w83627ehg_enable_dev(device_t dev, u16 iobase);
-void w83627ehg_disable_dev(device_t dev);
-#endif
-
void pnp_enter_ext_func_mode(device_t dev);
void pnp_exit_ext_func_mode(device_t dev);