diff options
| author | Sunwei Li <lisunwei@huaqin.corp-partner.google.com> | 2021-09-16 11:09:11 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-17 22:19:53 +0000 |
| commit | 8d46db20a3605606e9f6b25512aa3569ce818746 (patch) | |
| tree | cf8d9be73c94972ea1aa4f5b93d2534750328042 | |
| parent | b0e11503e787e8d206f24f0e59c4dd62e7e29a13 (diff) | |
mb/google/dedede/var/cappy2: Update DPTF parameters
Update DPTF parameters from internal thermal team.
BUG=b:197546694
BRANCH=dedede
TEST=emerge-keeby coreboot
Signed-off-by: Sunwei Li <lisunwei@huaqin.corp-partner.google.com>
Change-Id: I71a76a4d94a704aef7b3cefa2fca3009eb765bb6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57693
Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/dedede/variants/cappy2/overridetree.cb | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/cappy2/overridetree.cb b/src/mainboard/google/dedede/variants/cappy2/overridetree.cb index b410fa4827..645e36ec5e 100644 --- a/src/mainboard/google/dedede/variants/cappy2/overridetree.cb +++ b/src/mainboard/google/dedede/variants/cappy2/overridetree.cb @@ -42,6 +42,7 @@ chip soc/intel/jasperlake }" register "disable_external_bypass_vr" = "1" # Does not support external vnn power rail + register "tcc_offset" = "10" # TCC of 95C # USB Port Configuration register "usb2_ports[0]" = "{ @@ -70,6 +71,42 @@ chip soc/intel/jasperlake }" # Camera device domain 0 on + device pci 04.0 on + chip drivers/intel/dptf + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 52, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 52, 5000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 50, 5000),}" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),}" + register "controls.power_limits.pl1" = "{ + .min_power = 3500, + .max_power = 6000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 28 * MSECS_PER_SEC, + .granularity = 250,}" + register "controls.power_limits.pl2" = "{ + .min_power = 20000, + .max_power = 20000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 1000,}" + ## Charger Performance Control (Control, mA) + register "controls.charger_perf" = "{ + [0] = { 255, 3000 }, + [1] = { 32, 2000 }, + [2] = { 24, 1500 }, + [3] = { 16, 1000 }, + [4] = { 8, 500 } + }" + device generic 0 on end + end + end # SA Thermal device device pci 14.0 on chip drivers/usb/acpi device usb 0.0 on |