diff options
| author | Martin Roth <martinroth@chromium.org> | 2021-06-21 09:18:46 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-25 15:51:20 +0000 |
| commit | 8a85a84fac7157927612cd638cf67c061d959bd8 (patch) | |
| tree | fec6ab28b277215fdbbe90df8b1a982870d0bc9d | |
| parent | b8bba6519ee0411010eaadc0589144d4fea4c67b (diff) | |
Asm code: Use NO_EARLY_BOOTBLOCK_POSTCODES to remove Asm port80s
Expand NO_EARLY_BOOTBLOCK_POSTCODES to all of the early assembly code in
bootblock.
BUG=b:191370340
TEST: Build with & without the option enabled
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Idb4a96820d5c391fc17a0f0dcccd519d4881b78c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55731
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
| -rw-r--r-- | src/console/Kconfig | 10 | ||||
| -rw-r--r-- | src/cpu/x86/entry16.S | 2 | ||||
| -rw-r--r-- | src/cpu/x86/entry32.S | 2 | ||||
| -rw-r--r-- | src/include/cpu/x86/post_code.h | 2 |
4 files changed, 7 insertions, 9 deletions
diff --git a/src/console/Kconfig b/src/console/Kconfig index 548b701d9f..4125e18dd9 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -464,10 +464,12 @@ config NO_EARLY_BOOTBLOCK_POSTCODES def_bool n help Some chipsets require that the routing for the port 80h POST - code be configured before any POST codes are sent out. - This can be done in the boot block, but there are a couple of - POST codes that go out before the chipset's bootblock initialization - can happen. This option suppresses those POST codes. + code be configured before any POST codes are sent out. If this is + not done, the system can hang on the first POST code. This + initialization can be done in the boot block, but there are a couple + of POST codes that go out before the chipset's C bootblock + initialization can happen. This option suppresses all postcodes in + the early assembly code. config HWBASE_DEBUG_CB bool diff --git a/src/cpu/x86/entry16.S b/src/cpu/x86/entry16.S index 147906fe4d..d045c54937 100644 --- a/src/cpu/x86/entry16.S +++ b/src/cpu/x86/entry16.S @@ -43,9 +43,7 @@ _start16bit: cli /* Save the BIST result */ movl %eax, %ebp -#if !CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES) post_code(POST_RESET_VECTOR_CORRECT) -#endif /* IMMEDIATELY invalidate the translation lookaside buffer (TLB) before * executing any further code. Even though paging is disabled we diff --git a/src/cpu/x86/entry32.S b/src/cpu/x86/entry32.S index 639ab36a57..ad4a7d032b 100644 --- a/src/cpu/x86/entry32.S +++ b/src/cpu/x86/entry32.S @@ -31,9 +31,7 @@ bootblock_protected_mode_entry: /* Save the BIST value */ movl %eax, %ebp -#if !CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES) post_code(POST_ENTER_PROTECTED_MODE) -#endif movw $ROM_DATA_SEG, %ax movw %ax, %ds diff --git a/src/include/cpu/x86/post_code.h b/src/include/cpu/x86/post_code.h index 077f964335..de1100607a 100644 --- a/src/include/cpu/x86/post_code.h +++ b/src/include/cpu/x86/post_code.h @@ -3,7 +3,7 @@ #include <console/post_codes.h> -#if CONFIG(POST_IO) +#if CONFIG(POST_IO) && !(ENV_BOOTBLOCK && CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES)) #define post_code(value) \ movb $value, %al; \ outb %al, $CONFIG_POST_IO_PORT |