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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-15 19:37:21 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-17 19:33:41 +0000 |
| commit | 8a303b7865203bd208c9424f0c641e1c94a8e6fa (patch) | |
| tree | 20060aa5abfa79535dc75538b7ff6b255774e071 | |
| parent | 5df9df55b77cff9dd26aa8783e81cdf39ffe48bf (diff) | |
AGESA: Add guard for acpi_get_sleep_type()
With EARLY_CBMEM_INIT, this is defined from ACPI layer
instead for ENV_RAMSTAGE.
Change-Id: Ia9c1be4d3acaa0fa8827350558e6578c39b71602
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/ramtop.c | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/ramtop.c | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/ramtop.c b/src/southbridge/amd/agesa/hudson/ramtop.c index 22b291d1bb..34cf74ebd2 100644 --- a/src/southbridge/amd/agesa/hudson/ramtop.c +++ b/src/southbridge/amd/agesa/hudson/ramtop.c @@ -19,6 +19,8 @@ #include <cbmem.h> #include "hudson.h" +#if !ENV_RAMSTAGE || IS_ENABLED(CONFIG_LATE_CBMEM_INIT) + int acpi_get_sleep_type(void) { u16 tmp = inw(ACPI_PM1_CNT_BLK); @@ -26,6 +28,8 @@ int acpi_get_sleep_type(void) return (int)tmp; } +#endif + void backup_top_of_low_cacheable(uintptr_t ramtop) { u32 dword = ramtop; diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c index 3c685767bc..2281f83958 100644 --- a/src/southbridge/amd/cimx/sb800/ramtop.c +++ b/src/southbridge/amd/cimx/sb800/ramtop.c @@ -19,6 +19,8 @@ #include <cbmem.h> #include "SBPLATFORM.h" +#if !ENV_RAMSTAGE || IS_ENABLED(CONFIG_LATE_CBMEM_INIT) + int acpi_get_sleep_type(void) { u16 tmp = inw(PM1_CNT_BLK_ADDRESS); @@ -26,6 +28,8 @@ int acpi_get_sleep_type(void) return (int)tmp; } +#endif + void backup_top_of_low_cacheable(uintptr_t ramtop) { u32 dword = ramtop; |