diff options
author | Frank Chu <Frank_Chu@pegatron.corp-partner.google.com> | 2022-12-02 13:49:06 +0800 |
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committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-12-12 02:26:37 +0000 |
commit | 891e6c37a0f642259faf2dd2e63d17336e0f9943 (patch) | |
tree | b67ec751cd7d096f9481a95777735a1baa2e80a4 | |
parent | 843699e3cf480de9f4d116c5cf0eb8d832103caa (diff) |
mb/google/brya/var/marasov: Disable unused I2C bus
Disable unused I2C2/I2C4 bus for marasov.
BUG=b:260565911
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: Frank Chu <Frank_Chu@pegatron.corp-partner.google.com>
Change-Id: Id1c41bfdca9b752e3f027e6b071629d67aa06761
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70237
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Frank Chu <frank_chu@pegatron.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
-rw-r--r-- | src/mainboard/google/brya/variants/marasov/overridetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index b7faf0f8a1..6a5ad49e70 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -64,7 +64,12 @@ chip soc/intel/alderlake .vnn_sx_voltage_mv = 1250, }" register "serial_io_i2c_mode" = "{ + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoDisabled, + [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C4] = PchSerialIoDisabled, + [PchSerialIoIndexI2C5] = PchSerialIoPci, }" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0 |