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authorPuthikorn Voravootivat <puthik@chromium.org>2019-02-26 15:56:14 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-02-28 17:05:35 +0000
commit805bd10eded9b553c7fe032f9a54874b29986c1c (patch)
treeff44c3d1e62d3c79610e15fc99cf334b2ee92ef0
parent8997f67cf0e28e655cae084bc98dc91973e04657 (diff)
mb/google/poppy/variants/atlas: Update DPTF parameters
Preliminary dptf change for Atlas - Throttle charger using all temp sensors (not just ambient) - Throttle charger with higher priority than CPU - Update throttle temperature using data from surface thermistor in thermal chamber test BUG=b:113101335 BRANCH=None TEST=based on preliminary data from thermal chamber test Change-Id: Ic1ab72f569e8a4f7bffc5560518fb703d32f4b21 Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://review.coreboot.org/c/31628 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Caveh Jalali <caveh@google.com>
-rw-r--r--src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl28
1 files changed, 17 insertions, 11 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
index 85eb891c63..44aed8bf4a 100644
--- a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
@@ -24,17 +24,17 @@
#define DPTF_TSR1_SENSOR_ID 2
#define DPTF_TSR1_SENSOR_NAME "Charger"
-#define DPTF_TSR1_PASSIVE 48
+#define DPTF_TSR1_PASSIVE 53
#define DPTF_TSR1_CRITICAL 90
#define DPTF_TSR2_SENSOR_ID 3
#define DPTF_TSR2_SENSOR_NAME "DRAM"
-#define DPTF_TSR2_PASSIVE 65
+#define DPTF_TSR2_PASSIVE 54
#define DPTF_TSR2_CRITICAL 75
#define DPTF_TSR3_SENSOR_ID 4
#define DPTF_TSR3_SENSOR_NAME "eMMC"
-#define DPTF_TSR3_PASSIVE 65
+#define DPTF_TSR3_PASSIVE 54
#define DPTF_TSR3_CRITICAL 75
#undef DPTF_ENABLE_FAN_CONTROL
@@ -52,20 +52,26 @@ Name (DTRT, Package () {
/* CPU Throttle Effect on CPU */
Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 10, 0, 0, 0, 0 },
- /* CPU Throttle Effect on TSR0 */
+ /* CPU Throttle Effect on Ambient */
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
- /* CPU Throttle Effect on TSR1 */
- Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
-
- /* CPU Throttle Effect on TSR2 */
+ /* CPU Throttle Effect on DRAM */
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
- /* CPU Throttle Effect on TSR3 */
+ /* CPU Throttle Effect on eMMC */
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR3, 100, 600, 0, 0, 0, 0 },
- /* Charger Throttle Effect on TSR0 */
- Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
+ /* Charger Throttle Effect on Ambient */
+ Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR0, 200, 50, 0, 0, 0, 0 },
+
+ /* Charger Throttle Effect on Charger */
+ Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 50, 0, 0, 0, 0 },
+
+ /* Charger Throttle Effect on DRAM */
+ Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 200, 50, 0, 0, 0, 0 },
+
+ /* Charger Throttle Effect on eMMC */
+ Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR3, 200, 50, 0, 0, 0, 0 },
})
Name (MPPC, Package ()