diff options
| author | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-05-23 15:04:26 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-25 13:04:40 +0000 |
| commit | 7dab99856d22ced1075471e4747d93c2dc6eec86 (patch) | |
| tree | 25377996c19519ff893f54b5a9342f68a4889187 | |
| parent | dcabf1bd97a691f51c529e46c7bfba119404464c (diff) | |
mb/google/skyrim/var/winterhold: Fix USB port register scope
Commit f99d6700 ("mb/google/skyrim/var/winterhold: Fix USB port ACPI
generation") fixed the USB-A ports being double-nested, but neglected
to move the chip driver registers up into the correct scope. While the
generated ACPI is still correct, fix the register scope anyway to
avoid confusion.
BUG=b:283778468
BRANCH=skyrim
TEST=build/boot winterhold, dump ACPI, verify unchanged
Change-Id: Ia9982fed0fe2093d787ee9506ac5bbadd6cc03f9
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75389
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
| -rw-r--r-- | src/mainboard/google/skyrim/variants/winterhold/overridetree.cb | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb index 48800dd42c..57e2cab90b 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb @@ -136,20 +136,18 @@ chip soc/amd/mendocino chip drivers/usb/acpi device ref xhci_1_root_hub on # XHCI1 root hub chip drivers/usb/acpi - device ref usb3_port3 on # USB 3.1 port3 - register "desc" = ""USB3 Type-A Port A0 (MLB)"" - register "type" = "UPC_TYPE_USB3_A" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))" - end # USB 3.1 port3 + register "desc" = ""USB3 Type-A Port A0 (MLB)"" + register "type" = "UPC_TYPE_USB3_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))" + device ref usb3_port3 on end # USB 3.1 port3 end chip drivers/usb/acpi - device ref usb2_port3 on # USB 2 port3 - register "desc" = ""USB2 Type-A Port A0 (MLB)"" - register "type" = "UPC_TYPE_USB3_A" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))" - end # USB 2 port3 + register "desc" = ""USB2 Type-A Port A0 (MLB)"" + register "type" = "UPC_TYPE_USB3_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))" + device ref usb2_port3 on end # USB 2 port3 end end # XHCI1 root hub end |