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authorElyes Haouas <ehaouas@noos.fr>2022-10-02 12:42:54 +0200
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-10-06 17:00:47 +0000
commit7b7b8e48d8a70216863e8e5331cbee05cab7f48b (patch)
tree0caf2ba057fe2b08f6453477372138e85e5c3c03
parent7df5c68689173e3ab9c76fbda919268a774efac7 (diff)
cpu/intel/common/fsb.c: Sorte includes and add <stdint.h>
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I9b85836ac21da5b885a97f05e3973fb23a052fd5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
-rw-r--r--src/cpu/intel/common/fsb.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c
index 350e8c693b..92f88cd19a 100644
--- a/src/cpu/intel/common/fsb.c
+++ b/src/cpu/intel/common/fsb.c
@@ -1,13 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/cpu.h>
+#include <commonlib/helpers.h>
+#include <console/console.h>
+#include <cpu/intel/fsb.h>
+#include <cpu/intel/speedstep.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
-#include <cpu/intel/speedstep.h>
-#include <cpu/intel/fsb.h>
-#include <console/console.h>
-#include <commonlib/helpers.h>
#include <delay.h>
+#include <stdint.h>
static u32 timer_fsb;
static u32 timer_tsc;