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authorAngel Pons <th3fanbus@gmail.com>2021-06-04 12:57:21 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-06-07 11:36:53 +0000
commit772c09739ea81e589c42bd8e063119a5fdf38176 (patch)
treee423bb3145ac30aa995021921d892863a2dd6189
parent1128817ed644e86daa3972e68eb08761fd6b0da9 (diff)
cpu/intel/model_206ax/acpi.c: Do not report P_BLK
IO MWAIT redirection is disabled, which means reads to the P_LVL2 and P_LVL3 "registers" will never produce any C-state transition requests. Change-Id: Ibbf7b915a9909d6bc8e784a439df751e11ec5bee Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
-rw-r--r--src/cpu/intel/model_2065x/acpi.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c
index 39d028bbbe..11899c615d 100644
--- a/src/cpu/intel/model_2065x/acpi.c
+++ b/src/cpu/intel/model_2065x/acpi.c
@@ -205,7 +205,7 @@ static void generate_P_state_entries(int core, int cores_per_package)
void generate_cpu_entries(const struct device *device)
{
- int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
+ int coreID, cpuID;
int totalcores = dev_count_cpu();
int cores_per_package = get_cores_per_package();
int numcpus = totalcores/cores_per_package;
@@ -215,15 +215,9 @@ void generate_cpu_entries(const struct device *device)
for (cpuID = 1; cpuID <= numcpus; cpuID++) {
for (coreID = 1; coreID <= cores_per_package; coreID++) {
- if (coreID > 1) {
- pcontrol_blk = 0;
- plen = 0;
- }
-
/* Generate processor \_SB.CPUx */
acpigen_write_processor(
- (cpuID-1)*cores_per_package+coreID-1,
- pcontrol_blk, plen);
+ (cpuID-1)*cores_per_package+coreID-1, 0, 0);
/* Generate P-state tables */
generate_P_state_entries(