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authorMario Scheithauer <mario.scheithauer@siemens.com>2021-08-25 15:29:34 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-14 13:06:45 +0000
commit76b4e414f30e155d86d2d86d91c887b9f15dce27 (patch)
treec45aaeaf5b91e566cf6cba3e88108bc1b218e46f
parent0c3aaba9561ac794c6bab3baa0465a0e1884f7f6 (diff)
mb/siemens/mc_ehl2: Adjust USB settings
Correct the USB settings, suitable for this mainboard. Change-Id: I691d91d2a76e27b8efdc18eeae737a78e9ae38fa Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index 06fdf0a180..9d037cad6b 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -27,21 +27,21 @@ chip soc/intel/elkhartlake
}"
# USB related UPDs
- register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)" # USB3/2 Type A port 1
- register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)" # USB3/2 Type A Port 2
- register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Onboard USB
- register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Port is unused
- register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Port is unused
- register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Port is unused
- register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Port is unused
- register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Port is unused
- register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Port is unused
- register "usb2_ports[9]" = "USB2_PORT_EMPTY" # Port is unused
+ register "usb2_ports[0]" = "USB2_PORT_MID(OC2)" # X125/X135
+ register "usb2_ports[1]" = "USB2_PORT_MID(OC2)" # X125/X135
+ register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # X145/X155
+ register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # X145/X155
+ register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # USB Panel
+ register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # USB Panel
+ register "usb2_ports[6]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[7]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[8]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[9]" = "USB2_PORT_EMPTY"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port1
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port2
- register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Port is not used
- register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Port is not used
+ register "usb3_ports[2]" = "USB3_PORT_EMPTY" # UNUSED
+ register "usb3_ports[3]" = "USB3_PORT_EMPTY" # UNUSED
# Skip the CPU repalcement check
register "SkipCpuReplacementCheck" = "1"