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authorSubrata Banik <subratabanik@google.com>2022-03-30 23:57:37 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-04-02 14:55:24 +0000
commit7578ea43ceafd78b46ab64610c9fa86172152081 (patch)
tree82da77ae643868b6da8e5b47142398a03b7cb8c1
parent3ad00d0c89c9e7a8e9ef13b6dc65bb338a191ec8 (diff)
{cpu/x86, drivers/amd}: Use `get_var_mtrr_count()` to get MTRR count
This patch replaces the implementation that is used to get the number of variable MTRRs with `get_var_mtrr_count()` function. BUG=b:225766934 TEST=Able to build and boot google/redrix board to ChromeOS. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I4751add9c45374e60b7a425df87d06f52e6fcb8c Reviewed-on: https://review.coreboot.org/c/coreboot/+/63219 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/cpu/x86/mp_init.c4
-rw-r--r--src/cpu/x86/mtrr/mtrr.c6
-rw-r--r--src/cpu/x86/mtrr/xip_cache.c3
-rw-r--r--src/drivers/amd/agesa/mtrr_fixme.c3
4 files changed, 4 insertions, 12 deletions
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index 1f1f968ae7..81c987b668 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -247,11 +247,9 @@ static int save_bsp_msrs(char *start, int size)
int num_var_mtrrs;
struct saved_msr *msr_entry;
int i;
- msr_t msr;
/* Determine number of MTRRs need to be saved. */
- msr = rdmsr(MTRR_CAP_MSR);
- num_var_mtrrs = msr.lo & 0xff;
+ num_var_mtrrs = get_var_mtrr_count();
/* 2 * num_var_mtrrs for base and mask. +1 for IA32_MTRR_DEF_TYPE. */
msr_count = 2 * num_var_mtrrs + NUM_FIXED_MTRRS + 1;
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 185014e716..84d844a066 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -41,11 +41,7 @@ static int total_mtrrs;
static void detect_var_mtrrs(void)
{
- msr_t msr;
-
- msr = rdmsr(MTRR_CAP_MSR);
-
- total_mtrrs = msr.lo & 0xff;
+ total_mtrrs = get_var_mtrr_count();
if (total_mtrrs > NUM_MTRR_STATIC_STORAGE) {
printk(BIOS_WARNING,
diff --git a/src/cpu/x86/mtrr/xip_cache.c b/src/cpu/x86/mtrr/xip_cache.c
index cd82e4fc71..6ed96af95f 100644
--- a/src/cpu/x86/mtrr/xip_cache.c
+++ b/src/cpu/x86/mtrr/xip_cache.c
@@ -14,8 +14,7 @@
the MTRR, no matter the caching type, are filled and not overlapping. */
static uint32_t max_cache_used(void)
{
- msr_t msr = rdmsr(MTRR_CAP_MSR);
- int i, total_mtrrs = msr.lo & MTRR_CAP_VCNT;
+ int i, total_mtrrs = get_var_mtrr_count();
uint32_t total_cache = 0;
for (i = 0; i < total_mtrrs; i++) {
diff --git a/src/drivers/amd/agesa/mtrr_fixme.c b/src/drivers/amd/agesa/mtrr_fixme.c
index c589553698..1313b5d6ec 100644
--- a/src/drivers/amd/agesa/mtrr_fixme.c
+++ b/src/drivers/amd/agesa/mtrr_fixme.c
@@ -14,8 +14,7 @@ static void set_range_uc(u32 base, u32 size)
{
int i, max_var_mtrrs;
msr_t msr;
- msr = rdmsr(MTRR_CAP_MSR);
- max_var_mtrrs = msr.lo & MTRR_CAP_VCNT;
+ max_var_mtrrs = get_var_mtrr_count();
for (i = 0; i < max_var_mtrrs; i++) {
msr = rdmsr(MTRR_PHYS_MASK(i));