diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2013-12-13 16:01:56 -0800 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-12 22:09:49 +0200 |
commit | 73c0a05bc704659fcd1c70cc5d97e134de54c8f3 (patch) | |
tree | 8e2425ed4e049211b1afd630a665430de8ccdf89 | |
parent | 7e647f596c007567e421defd0d2963070daed497 (diff) |
rambi: Disable HSUART2 and SPI interfaces
Not used currently on rambi board. Disable in case it
saves power.
BUG=chrome-os-partner:23862
BRANCH=none
TEST=build and boot on rambi
Change-Id: Idb870c2cfa88cb6c3f1ada3caf0db566e33ec1eb
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180084
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5020
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
-rw-r--r-- | src/mainboard/google/rambi/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb index bfb9e303e1..fe5ec7b46a 100644 --- a/src/mainboard/google/rambi/devicetree.cb +++ b/src/mainboard/google/rambi/devicetree.cb @@ -75,8 +75,8 @@ chip soc/intel/baytrail device pci 1e.1 off end # PWM1 device pci 1e.2 off end # PWM2 device pci 1e.3 off end # HSUART1 - device pci 1e.4 on end # HSUART2 - device pci 1e.5 on end # SPI + device pci 1e.4 off end # HSUART2 + device pci 1e.5 off end # SPI device pci 1f.0 on chip ec/google/chromeec # We only have one init function that |