diff options
| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-27 22:54:10 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-30 23:07:31 +0200 |
| commit | 6ea86b19f34ec2a54b355e10a8f4e6e84ffa74ce (patch) | |
| tree | 1ea0e04f41c4cd1cde2e176b92d39d4fde7271e8 | |
| parent | 35555167c2e13e114a8bd8d9be5e1e0ad07b3484 (diff) | |
Sandybridge: Temporarily disable MRC cache finding code
This code is still using libfdt which was denied for inclusion
in coreboot, so it won't compile as is.
Without MRC cache, waking from suspend won't work, and cold boots are
significantly slower (adds around 300-400ms per channel IIRC).
A rework of this code is currently in the works, but will take a little bit
more time (and should not hold back the mainboards being merged)
Change-Id: Ifb9e7d7b86c1f52378803a748810da0d51b58384
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/948
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 0da968d776..dcf9f637f3 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -121,6 +121,7 @@ static void save_mrc_data(struct pei_data *pei_data) #if CONFIG_CHROMEOS static void prepare_mrc_cache(struct pei_data *pei_data) { +#if 0 const struct fdt_header *fdt_header; const struct fdt_property *fdtp; int offset, len; @@ -249,6 +250,9 @@ static void prepare_mrc_cache(struct pei_data *pei_data) printk(BIOS_DEBUG, "%s: at %p, entry %u size %x checksum %04x\n", __func__, pei_data->mrc_input, entry_id, pei_data->mrc_input_len, mrc_cache->mrc_checksum); +#else + printk(BIOS_ERR, "MRC cache handling code has to be redone."); +#endif } #endif |