soc/qualcomm/sc7280: Add SocInfo support in coreboot

Add support for SocInfo in coreboot. The API socinfo_modem_supported is
added to help to differentiate between LTE and WiFi SKUs.

BUG=b:232302324
TEST=Validate boards are detected correctly on LTE and Wifi SKUs

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Change-Id: I61047ad49772c3796ba403cafde311ad184a4093
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>

3 files changed, 106 insertions, 0 deletions

diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc
index 5691ff3180..6f94475d97 100644
--- a/src/soc/qualcomm/sc7280/Makefile.inc
+++ b/src/soc/qualcomm/sc7280/Makefile.inc
@@ -7,6 +7,7 @@ all-y += ../common/timer.c
 all-y += ../common/gpio.c
 all-y += ../common/clock.c
 all-y += clock.c
+all-y += socinfo.c
 all-y += ../common/spi.c
 all-$(CONFIG_SC7280_QSPI) += ../common/qspi.c
 all-y += ../common/qupv3_config.c
diff --git a/src/soc/qualcomm/sc7280/include/soc/socinfo.h b/src/soc/qualcomm/sc7280/include/soc/socinfo.h
new file mode 100644
index 0000000000..1034bf95f0
--- /dev/null
+++ b/src/soc/qualcomm/sc7280/include/soc/socinfo.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/**
+ Chip identification type.  Any new ids must be added to the end.
+ */
+
+typedef enum{
+	CHIPINFO_ID_UNKNOWN             = 0,
+	CHIPINFO_ID_SM_KODIAK           = 475,
+	CHIPINFO_ID_SC_KODIAK_CHROME    = 487,
+	CHIPINFO_ID_SC_7CPLUSGEN3       = CHIPINFO_ID_SC_KODIAK_CHROME,
+	CHIPINFO_ID_SC_KODIAK_WINDOWS   = 488,
+	CHIPINFO_ID_QCM_KODIAK          = 497,
+	CHIPINFO_ID_QCS_KODIAK          = 498,
+	CHIPINFO_ID_SMP_KODIAK          = 499,
+	CHIPINFO_ID_SM_KODIAK_LTE_ONLY  = 515,
+	CHIPINFO_ID_SCP_KODIAK          = 546,
+	CHIPINFO_ID_SCP_7CPLUSGEN3      = CHIPINFO_ID_SCP_KODIAK,
+	CHIPINFO_ID_SC_8CGEN3           = 553,
+	CHIPINFO_ID_SCP_8CGEN3          = 563,
+	CHIPINFO_ID_KODIAK_SCP_7CGEN3   = 567,
+	CHIPINFO_ID_QCS_KODIAK_LITE     = 575,
+	CHIPINFO_ID_QCM_KODIAK_LITE     = 576,
+
+	CHIPINFO_NUM_IDS,
+	CHIPINFO_ID_32BITS              = 0x7FFFFFF
+	} ChipInfoIdType;
+
+/*
+ * CHIPINFO_PARTNUM_*
+ *
+ * Definitions of part number/JTAG-ID fields.
+ */
+#define CHIPINFO_PARTNUM_SM_KODIAK		0x192
+#define CHIPINFO_PARTNUM_SC_KODIAK_CHROME	0x193
+#define CHIPINFO_PARTNUM_SC_KODIAK_WINDOWS	0x194
+#define CHIPINFO_PARTNUM_QCM_KODIAK		0x197
+#define CHIPINFO_PARTNUM_QCS_KODIAK		0x198
+#define CHIPINFO_PARTNUM_SMP_KODIAK		0x1A1
+#define CHIPINFO_PARTNUM_SM_KODIAK_LTE_ONLY	0x1B5
+#define CHIPINFO_PARTNUM_SCP_KODIAK		0x1EB
+#define CHIPINFO_PARTNUM_SC_8CGEN3		0x1E3
+#define CHIPINFO_PARTNUM_SCP_8CGEN3		0x20A
+#define CHIPINFO_PARTNUM_KODIAK_SCP_7CGEN3	0x215
+#define CHIPINFO_PARTNUM_QCS_KODIAK_LITE	0x20F
+#define CHIPINFO_PARTNUM_QCM_KODIAK_LITE	0x20E
+
+
+#define CHIPINFO_MODEM_SUPPORTED        0x1
+#define CHIPINFO_MODEM_UNKNOWN          0x0
+#define DEVICE_ID                       0xFFFF
+
+struct chipinfo {
+	uint32_t chipid;
+	uint32_t jtagid;
+	bool modem;
+};
+
+bool socinfo_modem_supported(void);
diff --git a/src/soc/qualcomm/sc7280/socinfo.c b/src/soc/qualcomm/sc7280/socinfo.c
new file mode 100644
index 0000000000..6e66abea67
--- /dev/null
+++ b/src/soc/qualcomm/sc7280/socinfo.c
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <assert.h>
+#include <commonlib/helpers.h>
+#include <device/mmio.h>
+#include <types.h>
+#include <soc/socinfo.h>
+#include <soc/addressmap.h>
+
+#define JTAG_OFFSET	0xB1014
+
+static struct chipinfo chipinfolut[] = {
+	{ CHIPINFO_ID_SM_KODIAK, CHIPINFO_PARTNUM_SM_KODIAK, CHIPINFO_MODEM_SUPPORTED},
+	{ CHIPINFO_ID_SC_KODIAK_CHROME, CHIPINFO_PARTNUM_SC_KODIAK_CHROME,
+		CHIPINFO_MODEM_SUPPORTED },
+	{ CHIPINFO_ID_SC_KODIAK_WINDOWS, CHIPINFO_PARTNUM_SC_KODIAK_WINDOWS,
+		CHIPINFO_MODEM_SUPPORTED},
+	{ CHIPINFO_ID_QCM_KODIAK, CHIPINFO_PARTNUM_QCM_KODIAK, CHIPINFO_MODEM_SUPPORTED },
+	{ CHIPINFO_ID_QCS_KODIAK, CHIPINFO_PARTNUM_QCS_KODIAK, CHIPINFO_MODEM_UNKNOWN },
+	{ CHIPINFO_ID_SMP_KODIAK, CHIPINFO_PARTNUM_SMP_KODIAK, CHIPINFO_MODEM_UNKNOWN },
+	{ CHIPINFO_ID_SM_KODIAK_LTE_ONLY, CHIPINFO_PARTNUM_SM_KODIAK_LTE_ONLY,
+		CHIPINFO_MODEM_SUPPORTED },
+	{ CHIPINFO_ID_SCP_KODIAK, CHIPINFO_PARTNUM_SCP_KODIAK, CHIPINFO_MODEM_UNKNOWN },
+	{ CHIPINFO_ID_SC_8CGEN3, CHIPINFO_PARTNUM_SC_8CGEN3, CHIPINFO_MODEM_SUPPORTED },
+	{ CHIPINFO_ID_SCP_8CGEN3, CHIPINFO_PARTNUM_SCP_8CGEN3, CHIPINFO_MODEM_UNKNOWN },
+	{ CHIPINFO_ID_KODIAK_SCP_7CGEN3, CHIPINFO_PARTNUM_KODIAK_SCP_7CGEN3,
+		CHIPINFO_MODEM_UNKNOWN },
+	{ CHIPINFO_ID_QCS_KODIAK_LITE, CHIPINFO_PARTNUM_QCS_KODIAK_LITE,
+		CHIPINFO_MODEM_UNKNOWN },
+	{ CHIPINFO_ID_QCM_KODIAK_LITE, CHIPINFO_PARTNUM_QCM_KODIAK_LITE,
+		CHIPINFO_MODEM_UNKNOWN },
+};
+
+bool socinfo_modem_supported(void)
+{
+	uint32_t jtagid;
+	int i;
+
+	jtagid = read32((void *)(TLMM_TILE_BASE + JTAG_OFFSET)) & DEVICE_ID;
+
+	for (i = 0; i < ARRAY_SIZE(chipinfolut); i++)
+		if (chipinfolut[i].jtagid == jtagid)
+			return chipinfolut[i].modem;
+
+	return false;
+}