diff options
| author | Martin Roth <gaumless@gmail.com> | 2023-01-27 17:25:51 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-01 18:24:48 +0000 |
| commit | 67efe443b1665b2e93962e6bfb468e87190a73c5 (patch) | |
| tree | 064907c508365e6ecaff84d53addb4fba402f431 | |
| parent | c08bacab05584275ec03eae8a94ab1ddb2b795e6 (diff) | |
soc/amd/mendocino: Force resets to be cold
Like Cezanne, Mendocino does not support warm resets. Change all resets
(including resets in the OS) to cold resets (like Cezanne).
BUG=b:248221908
TEST=Run suspend_stress_test, then reboot
Change-Id: I1fbb4cc6eb6e6de9616d00d0191ccf3c0ac55278
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72486
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Van Patten <timvp@google.com>
| -rw-r--r-- | src/soc/amd/mendocino/fch.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/reset.c | 4 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/amd/mendocino/fch.c b/src/soc/amd/mendocino/fch.c index d7c488bf67..abe2dc1177 100644 --- a/src/soc/amd/mendocino/fch.c +++ b/src/soc/amd/mendocino/fch.c @@ -126,6 +126,11 @@ static void fch_init_acpi_ports(void) PM_ACPI_TIMER_EN_EN); } +static void fch_init_resets(void) +{ + pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) | TOGGLE_ALL_PWR_GOOD); +} + /* configure the general purpose PCIe clock outputs according to the devicetree settings */ static void gpp_clk_setup(void) { @@ -197,6 +202,7 @@ static void cgpll_clock_gate_init(void) void fch_init(void *chip_info) { + fch_init_resets(); i2c_soc_init(); fch_init_acpi_ports(); diff --git a/src/soc/amd/mendocino/reset.c b/src/soc/amd/mendocino/reset.c index 800374c260..ac0c981718 100644 --- a/src/soc/amd/mendocino/reset.c +++ b/src/soc/amd/mendocino/reset.c @@ -17,8 +17,8 @@ void do_cold_reset(void) void do_warm_reset(void) { - /* Assert reset signals only. */ - outb(RST_CPU | SYS_RST, RST_CNT); + /* Warm resets are not supported and must be executed as cold */ + do_cold_reset(); } void do_board_reset(void) |