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authorFurquan Shaikh <furquan@google.com>2020-07-21 21:51:27 -0700
committerFelix Held <felix-coreboot@felixheld.de>2020-07-23 14:11:03 +0000
commit65e111774113a03bb4c6752c963f15f0d524aaae (patch)
treeabb494933cbba89d89edd9dbfee6df13004faf21
parentac16650e0cad71905678bf9aecc2f78dd7da228d (diff)
mb/google/zork: Configure all pads in ramstage for trembyle reference
This change configures all missing pads in ramstage for trembyle reference. This ensures that the state of all pads is set correctly for the payload/OS. Also, all the pads for the platform are configured in baseboard gpio table in ramstage to ensure that variants can override any pads if required. BUG=b:154351731 Change-Id: Idd827b6a4f995546493596f22249f8699bdf526b Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c56
-rw-r--r--src/mainboard/google/zork/variants/berknip/gpio.c2
-rw-r--r--src/mainboard/google/zork/variants/ezkinil/gpio.c4
-rw-r--r--src/mainboard/google/zork/variants/morphius/gpio.c4
-rw-r--r--src/mainboard/google/zork/variants/trembyle/gpio.c4
5 files changed, 70 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index c2d290ad91..f4af816bd1 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -16,6 +16,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_NF(GPIO_1, SYS_RESET_L, PULL_NONE),
/* PCIE_WAKE_L */
PAD_NF(GPIO_2, WAKE_L, PULL_NONE),
+ /* H1_FCH_INT_ODL */
+ PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY),
/* PEN_DETECT_ODL */
PAD_WAKE(GPIO_4, PULL_NONE, EDGE_HIGH, S3),
/* PEN_POWER_EN - Enabled*/
@@ -38,12 +40,17 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_GPO(GPIO_13, HIGH),
/* BT_DISABLE */
PAD_GPO(GPIO_14, LOW),
+ /* GPIO_15: Not available */
/* USB_OC0_L - USB C0 + USB A0 */
PAD_NF(GPIO_16, USB_OC0_L, PULL_NONE),
/* USB_OC1_L - USB C1 + USB A1 */
PAD_NF(GPIO_17, USB_OC1_L, PULL_NONE),
/* WIFI_DISABLE */
PAD_GPO(GPIO_18, LOW),
+ /* I2C3_SCL - H1 */
+ PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
+ /* I2C3_SDA - H1 */
+ PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
/* EMMC_CMD */
PAD_NF(GPIO_21, EMMC_CMD, PULL_NONE),
/* EC_FCH_SCI_ODL */
@@ -52,10 +59,26 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_NF(GPIO_23, AC_PRES, PULL_UP),
/* EC_FCH_WAKE_L */
PAD_SCI(GPIO_24, PULL_NONE, EDGE_LOW),
+ /* GPIO_25: Not available */
+ /* PCIE_RST0_L - Fixed timings */
+ PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
+ /* PCIE_RST1_L (unused) */
+ PAD_NC(GPIO_27),
+ /* GPIO_28: Not available */
+ /* GPIO_29: unused */
+ PAD_NC(GPIO_29),
+ /* FCH_ESPI_EC_CS_L */
+ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
/* EC_AP_INT_ODL (Sensor Framesync) */
PAD_GPI(GPIO_31, PULL_NONE),
/* EN_PWR_FP */
PAD_GPO(GPIO_32, HIGH),
+ /* GPIO_33 - GPIO_39: Not available */
+ /* NVME_AUX_RESET_L */
+ PAD_GPO(GPIO_40, HIGH),
+ /* GPIO_41: Not available */
+ /* GPIO_42: Handled in bootblock for wifi power/reset control. */
+ /* GPIO_43 - GPIO_66: Not available */
/* DMIC SEL */
/*
* Make sure Ext ROM Sharing is disabled before using this GPIO. Otherwise SPI flash
@@ -68,14 +91,20 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_GPO(GPIO_69, LOW),
/* EMMC_CLK */
PAD_NF(GPIO_70, EMMC_CLK, PULL_NONE),
+ /* GPIO_71 - GPIO_73: Not available */
/* EMMC_DATA4 */
PAD_NF(GPIO_74, EMMC_DATA4, PULL_NONE),
/* EMMC_DATA6 */
PAD_NF(GPIO_75, EMMC_DATA6, PULL_NONE),
/* EN_PWR_CAMERA */
PAD_GPO(GPIO_76, HIGH),
+ /* GPIO_77 - GPIO_83: Not available */
+ /* RAM_ID_4 */
+ PAD_GPI(GPIO_84, PULL_NONE),
/* APU_EDP_BL_DISABLE TODP: Set low in depthcharge */
PAD_GPO(GPIO_85, HIGH),
+ /* WIFI_AUX_RESET_L */
+ PAD_GPO(GPIO_86, HIGH),
/* EMMC_DATA7 */
PAD_NF(GPIO_87, EMMC_DATA7, PULL_NONE),
/* EMMC_DATA5 */
@@ -86,6 +115,9 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_NC(GPIO_90),
/* EN_SPKR TODO: Verify driver enables this (add to ACPI) */
PAD_GPO(GPIO_91, LOW),
+ /* CLK_REQ0_L - WIFI */
+ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE),
+ /* GPIO_93 - GPIO_103: Not available */
/* EMMC_DATA0 */
PAD_NF(GPIO_104, EMMC_DATA0, PULL_NONE),
/* EMMC_DATA1 */
@@ -94,26 +126,50 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_NF(GPIO_106, EMMC_DATA2, PULL_NONE),
/* EMMC_DATA3 */
PAD_NF(GPIO_107, EMMC_DATA3, PULL_NONE),
+ /* ESPI_ALERT_L */
+ PAD_NF(GPIO_108, ESPI_ALERT_L, PULL_UP),
/* EMMC_DS */
PAD_NF(GPIO_109, EMMC_DS, PULL_NONE),
+ /* GPIO_110 - GPIO112: Not available */
/* I2C2_SCL - USI/Touchpad */
PAD_NF(GPIO_113, I2C2_SCL, PULL_NONE),
/* I2C2_SDA - USI/Touchpad */
PAD_NF(GPIO_114, I2C2_SDA, PULL_NONE),
+ /* CLK_REQ1_L - SD Card */
+ PAD_NF(GPIO_115, CLK_REQ1_L, PULL_NONE),
+ /* RAM_ID_3 */
+ PAD_GPI(GPIO_116, PULL_NONE),
+ /* GPIO_117 - GPIO_119: Not available */
+ /* RAM_ID_1 */
+ PAD_GPI(GPIO_120, PULL_NONE),
+ /* RAM_ID_0 */
+ PAD_GPI(GPIO_121, PULL_NONE),
+ /* GPIO_122 - GPIO_128: Not available */
/* KBRST_L */
PAD_NF(GPIO_129, KBRST_L, PULL_NONE),
/* EC_IN_RW_OD */
PAD_GPI(GPIO_130, PULL_NONE),
+ /* RAM_ID_2 */
+ PAD_GPI(GPIO_131, PULL_NONE),
+ /* CLK_REQ4_L - SSD */
+ PAD_NF(GPIO_132, CLK_REQ4_L, PULL_NONE),
+ /* GPIO_133 - GPIO_134: Not available */
/* DEV_BEEP_CODEC_IN (Dev beep Data out) */
PAD_GPI(GPIO_135, PULL_NONE),
+ /* UART0_RXD - DEBUG */
+ PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
/* BIOS_FLASH_WP_ODL */
PAD_GPI(GPIO_137, PULL_NONE),
+ /* UART0_TXD - DEBUG */
+ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
/* DEV_BEEP_BCLK */
PAD_GPI(GPIO_139, PULL_NONE),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
/* UART1_RXD - FPMCU */
PAD_NF(GPIO_141, UART1_RXD, PULL_NONE),
+ /* SD_AUX_RESET_L */
+ PAD_GPO(GPIO_142, HIGH),
/* UART1_TXD - FPMCU */
PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
/* USI_REPORT_EN */
diff --git a/src/mainboard/google/zork/variants/berknip/gpio.c b/src/mainboard/google/zork/variants/berknip/gpio.c
index 51a640b244..08b1c4da24 100644
--- a/src/mainboard/google/zork/variants/berknip/gpio.c
+++ b/src/mainboard/google/zork/variants/berknip/gpio.c
@@ -14,6 +14,8 @@ static const struct soc_amd_gpio berknip_bid1_gpio_set_stage_ram[] = {
PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
/* USB_OC2_L - USB A0 */
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
+ /* EN_PWR_WIFI */
+ PAD_GPO(GPIO_29, HIGH),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* MST_GPIO_2 (Fw Update HDMI hub) */
diff --git a/src/mainboard/google/zork/variants/ezkinil/gpio.c b/src/mainboard/google/zork/variants/ezkinil/gpio.c
index ece5a0ebfa..053c3c8f5e 100644
--- a/src/mainboard/google/zork/variants/ezkinil/gpio.c
+++ b/src/mainboard/google/zork/variants/ezkinil/gpio.c
@@ -14,6 +14,8 @@ static const struct soc_amd_gpio ezkinil_bid1_gpio_set_stage_ram[] = {
PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
/* USB_OC2_L - USB A0 */
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
+ /* EN_PWR_WIFI */
+ PAD_GPO(GPIO_29, HIGH),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* MST_GPIO_2 (Fw Update HDMI hub) */
@@ -27,6 +29,8 @@ static const struct soc_amd_gpio ezkinil_bid2_gpio_set_stage_ram[] = {
PAD_NC(GPIO_11),
/* DMIC_SEL */
PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic
+ /* EN_PWR_WIFI */
+ PAD_GPO(GPIO_29, HIGH),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* FPMCU_BOOT0 Change NC */
diff --git a/src/mainboard/google/zork/variants/morphius/gpio.c b/src/mainboard/google/zork/variants/morphius/gpio.c
index 7ff7088687..074fe006d4 100644
--- a/src/mainboard/google/zork/variants/morphius/gpio.c
+++ b/src/mainboard/google/zork/variants/morphius/gpio.c
@@ -14,6 +14,8 @@ static const struct soc_amd_gpio morphius_bid1_gpio_set_stage_ram[] = {
PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
/* USB_OC2_L - USB A0 */
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
+ /* EN_PWR_WIFI */
+ PAD_GPO(GPIO_29, HIGH),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* DMIC_AD_EN */
@@ -31,6 +33,8 @@ static const struct soc_amd_gpio morphius_bid2_gpio_set_stage_ram[] = {
PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
/* USB_OC2_L - USB A0 */
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
+ /* EN_PWR_WIFI */
+ PAD_GPO(GPIO_29, HIGH),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* MST_GPIO_2 (Fw Update HDMI hub) */
diff --git a/src/mainboard/google/zork/variants/trembyle/gpio.c b/src/mainboard/google/zork/variants/trembyle/gpio.c
index 6f7c4a2b2d..d8367e7e1a 100644
--- a/src/mainboard/google/zork/variants/trembyle/gpio.c
+++ b/src/mainboard/google/zork/variants/trembyle/gpio.c
@@ -14,6 +14,8 @@ static const struct soc_amd_gpio trembyle_bid1_bid2_gpio_set_stage_ram[] = {
PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
/* USB_OC2_L - USB A0 */
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
+ /* EN_PWR_WIFI */
+ PAD_GPO(GPIO_29, HIGH),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* DMIC_AD_EN */
@@ -31,6 +33,8 @@ static const struct soc_amd_gpio trembyle_bid3_gpio_set_stage_ram[] = {
PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
/* USB_OC2_L - USB A0 */
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
+ /* EN_PWR_WIFI */
+ PAD_GPO(GPIO_29, HIGH),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* MST_GPIO_2 (Fw Update HDMI hub) */