summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPhilip Chen <philipchen@chromium.org>2021-10-18 18:28:14 -0700
committerJulius Werner <jwerner@chromium.org>2021-10-20 22:23:56 +0000
commit64ed1f1f86826fa8f2e165b8ae27b9658546972a (patch)
tree7cb0728599f6618b2e7cd5fb0b8bb448945af38e
parent3f137169cbefdc87d251c740db032bc53d4a34b3 (diff)
google/trogdor: Support Parade ps8640
Support Parade ps8640 as the second source edp bridge for some trogdor board variants/revisions. BUG=b:194741013 BRANCH=trogdor TEST=verified firmware screen works on lazor rev9 Change-Id: Iae5ccd8d9d33d60e4c37011ecffdd7a05af59ab2 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
-rw-r--r--src/mainboard/google/trogdor/Kconfig1
-rw-r--r--src/mainboard/google/trogdor/board.h8
-rw-r--r--src/mainboard/google/trogdor/mainboard.c64
3 files changed, 63 insertions, 10 deletions
diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig
index be45bb0aeb..e70bc69e96 100644
--- a/src/mainboard/google/trogdor/Kconfig
+++ b/src/mainboard/google/trogdor/Kconfig
@@ -37,6 +37,7 @@ config BOARD_SPECIFIC_OPTIONS
select RTC if !BOARD_GOOGLE_BUBS
select MISSING_BOARD_RESET if BOARD_GOOGLE_BUBS
select DRIVERS_TI_SN65DSI86BRIDGE
+ select DRIVER_PARADE_PS8640
select SOC_QUALCOMM_SC7180
select SPI_FLASH
select SPI_FLASH_MACRONIX
diff --git a/src/mainboard/google/trogdor/board.h b/src/mainboard/google/trogdor/board.h
index 19024eb305..208cafc4da 100644
--- a/src/mainboard/google/trogdor/board.h
+++ b/src/mainboard/google/trogdor/board.h
@@ -25,6 +25,9 @@
#define GPIO_VDD_RESET_1V8 GPIO(87)
#define GPIO_EDP_BRIDGE_ENABLE dead_code_t(gpio_t)
#define GPIO_EN_PP3300_DX_EDP dead_code_t(gpio_t)
+#define GPIO_PS8640_EDP_BRIDGE_PD_L dead_code_t(gpio_t)
+#define GPIO_PS8640_EDP_BRIDGE_RST_L dead_code_t(gpio_t)
+#define GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE dead_code_t(gpio_t)
#else
#define GPIO_MIPI_1V8_ENABLE dead_code_t(gpio_t)
#define GPIO_AVDD_LCD_ENABLE dead_code_t(gpio_t)
@@ -36,6 +39,10 @@
(CONFIG(BOARD_GOOGLE_COACHZ) && board_id() == 0 ? GPIO(52) : \
(CONFIG(BOARD_GOOGLE_LAZOR) || CONFIG(BOARD_GOOGLE_POMPOM) ? GPIO(30) : \
GPIO(67)))))
+/*PS8640 specific GPIOs */
+#define GPIO_PS8640_EDP_BRIDGE_PD_L GPIO_EDP_BRIDGE_ENABLE
+#define GPIO_PS8640_EDP_BRIDGE_RST_L GPIO(11)
+#define GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE GPIO(32)
#endif
/* Fingerprint-specific GPIOs. Only for fingerprint-enabled devices (e.g. CoachZ). */
@@ -49,7 +56,6 @@
#define GPIO_EN_FP_RAILS dead_code_t(gpio_t)
#endif
-
void setup_chromeos_gpios(void);
#endif /* _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ */
diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c
index 2d9dac3ce6..55a341fecb 100644
--- a/src/mainboard/google/trogdor/mainboard.c
+++ b/src/mainboard/google/trogdor/mainboard.c
@@ -9,6 +9,7 @@
#include <device/mmio.h>
#include <mipi/panel.h>
#include <drivers/ti/sn65dsi86bridge/sn65dsi86bridge.h>
+#include <drivers/parade/ps8640/ps8640.h>
#include <edid.h>
#include <framebuffer_info.h>
#include <soc/display/mipi_dsi.h>
@@ -24,7 +25,8 @@
#include <soc/addressmap.h>
#define BRIDGE_BUS QUPV3_0_SE2
-#define BRIDGE_CHIP 0x2d
+#define BRIDGE_SN65DSI86_CHIP 0x2d
+#define BRIDGE_PS8640_CHIP 0x08
static struct usb_board_data usb0_board_data = {
.pll_bias_control_2 = 0x22,
@@ -71,7 +73,20 @@ static void load_qup_fw(void)
qupv3_se_fw_load_and_init(QUPV3_1_SE5, SE_PROTOCOL_I2C, MIXED); /* Codec I2C */
}
-static void power_on_bridge(void)
+static bool is_ps8640_bridge(void)
+{
+ /*
+ * Because the board_id pins for the early Homestar builds were
+ * misstuffed, after we enable tri-state board_id pins, a -rev1
+ * board reports itself as -rev19, and a -rev2 board reports itself
+ * as -rev23. We need to account for those quirks here.
+ */
+ return (CONFIG(BOARD_GOOGLE_HOMESTAR) && board_id() >= 4 &&
+ board_id() != 19 && board_id() != 23) ||
+ (CONFIG(BOARD_GOOGLE_LAZOR) && board_id() >= 9);
+}
+
+static void power_on_sn65dsi86_bridge(void)
{
printk(BIOS_INFO, "%s: Bridge gpio init\n", __func__);
@@ -82,6 +97,26 @@ static void power_on_bridge(void)
gpio_output(GPIO_EN_PP3300_DX_EDP, 1);
}
+static void power_on_ps8640_bridge(void)
+{
+ printk(BIOS_INFO, "%s: Bridge gpio init\n", __func__);
+
+ /* PP3300 EDP panel power supply */
+ gpio_output(GPIO_EN_PP3300_DX_EDP, 1);
+
+ gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 1);
+ gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1);
+ gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0);
+
+ /*
+ * According to ps8640 app note v0.6, wait for 2ms ("t1") after
+ * VDD33 goes high and then deassert RST.
+ */
+ mdelay(2);
+
+ gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 1);
+}
+
static void configure_mipi_panel(void)
{
int panel_id = sku_id() >> 8;
@@ -154,14 +189,19 @@ static enum cb_err display_init(struct panel_serializable_data *panel)
if (mdss_dsi_config(&panel->edid, lanes, dsi_bpp))
return CB_ERR;
+
if (CONFIG(TROGDOR_HAS_MIPI_PANEL)) {
if (mdss_dsi_panel_initialize(panel->init))
return CB_ERR;
- } else {
- sn65dsi86_bridge_configure(BRIDGE_BUS, BRIDGE_CHIP, &panel->edid,
- lanes, dsi_bpp);
+ } else if (!is_ps8640_bridge()) {
+ /*
+ * Parade ps8640 is auto-configured based on a pre-programmed
+ * SPI-ROM. Only TI sn65dsi86 needs to be configured here.
+ */
+ sn65dsi86_bridge_configure(BRIDGE_BUS, BRIDGE_SN65DSI86_CHIP,
+ &panel->edid, lanes, dsi_bpp);
if (CONFIG(TROGDOR_HAS_BRIDGE_BACKLIGHT))
- sn65dsi86_backlight_enable(BRIDGE_BUS, BRIDGE_CHIP);
+ sn65dsi86_backlight_enable(BRIDGE_BUS, BRIDGE_SN65DSI86_CHIP);
}
mdp_dsi_video_config(&panel->edid);
@@ -190,12 +230,18 @@ static void display_startup(void)
panel = get_mipi_panel(&orientation);
if (!panel)
return;
+ } else if (is_ps8640_bridge()) {
+ power_on_ps8640_bridge();
+ ps8640_init(BRIDGE_BUS, BRIDGE_PS8640_CHIP);
+ if (ps8640_get_edid(BRIDGE_BUS, BRIDGE_PS8640_CHIP, &panel->edid) < 0)
+ return;
} else {
enum dp_pll_clk_src ref_clk = SN65_SEL_19MHZ;
- power_on_bridge();
+ power_on_sn65dsi86_bridge();
mdelay(250); /* Delay for the panel to be up */
- sn65dsi86_bridge_init(BRIDGE_BUS, BRIDGE_CHIP, ref_clk);
- if (sn65dsi86_bridge_read_edid(BRIDGE_BUS, BRIDGE_CHIP, &panel->edid) < 0)
+ sn65dsi86_bridge_init(BRIDGE_BUS, BRIDGE_SN65DSI86_CHIP, ref_clk);
+ if (sn65dsi86_bridge_read_edid(BRIDGE_BUS, BRIDGE_SN65DSI86_CHIP,
+ &panel->edid) < 0)
return;
}