diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-07-12 17:07:28 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-07-25 22:55:50 +0000 |
| commit | 645203a28052b78c524bf101df960ae59f5828b0 (patch) | |
| tree | fa8f29e95dbe2249c7b88cbf13ac0a7ba3d92dd1 | |
| parent | c7f022ae9567aece54bb2d5a206c0ee27ec34f39 (diff) | |
soc/amd/common/psp_gen2: return status from soc_read_c2p38
This sort-of reverts commit 00ec1b9fc7ba ("soc/amd/common/block/psp/
psp_gen2: simplify soc_read_c2p38") and is done as a preparation to
switch back to using the MMIO access to the PSP mailbox registers.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Icca3c7832295ae9932778f6a64c493e474dad507
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
| -rw-r--r-- | src/soc/amd/common/block/psp/psb.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/psp_def.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/psp_gen2.c | 5 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/spl_fuse.c | 7 |
4 files changed, 15 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/psp/psb.c b/src/soc/amd/common/block/psp/psb.c index be20fc88c5..a537bff37b 100644 --- a/src/soc/amd/common/block/psp/psb.c +++ b/src/soc/amd/common/block/psp/psb.c @@ -110,7 +110,11 @@ static enum cb_err psb_enable(void) return CB_SUCCESS; } - status = soc_read_c2p38(); + if (soc_read_c2p38(&status) != CB_SUCCESS) { + printk(BIOS_ERR, "PSP: Failed to get base address.\n"); + return CB_ERR; + } + printk(BIOS_INFO, "PSB: HSTI = %x\n", status); const u32 psb_test_status = status & PSB_TEST_STATUS_MASK; diff --git a/src/soc/amd/common/block/psp/psp_def.h b/src/soc/amd/common/block/psp/psp_def.h index f6efa21802..104cabdb26 100644 --- a/src/soc/amd/common/block/psp/psp_def.h +++ b/src/soc/amd/common/block/psp/psp_def.h @@ -115,6 +115,6 @@ void psp_print_cmd_status(int cmd_status, struct mbox_buffer_header *header); /* This command needs to be implemented by the generation specific code. */ int send_psp_command(u32 command, void *buffer); -uint32_t soc_read_c2p38(void); +enum cb_err soc_read_c2p38(uint32_t *msg_38_value); #endif /* __AMD_PSP_DEF_H__ */ diff --git a/src/soc/amd/common/block/psp/psp_gen2.c b/src/soc/amd/common/block/psp/psp_gen2.c index 7b92cc2025..8f0bdcf9a1 100644 --- a/src/soc/amd/common/block/psp/psp_gen2.c +++ b/src/soc/amd/common/block/psp/psp_gen2.c @@ -176,7 +176,8 @@ int send_psp_command(u32 command, void *buffer) return 0; } -uint32_t soc_read_c2p38(void) +enum cb_err soc_read_c2p38(uint32_t *msg_38_value) { - return smn_read32(SMN_PSP_PUBLIC_BASE + CORE_2_PSP_MSG_38_OFFSET); + *msg_38_value = smn_read32(SMN_PSP_PUBLIC_BASE + CORE_2_PSP_MSG_38_OFFSET); + return CB_SUCCESS; } diff --git a/src/soc/amd/common/block/psp/spl_fuse.c b/src/soc/amd/common/block/psp/spl_fuse.c index cb1fab0bc0..b6e715ad4b 100644 --- a/src/soc/amd/common/block/psp/spl_fuse.c +++ b/src/soc/amd/common/block/psp/spl_fuse.c @@ -8,12 +8,17 @@ static void psp_set_spl_fuse(void *unused) { int cmd_status = 0; + uint32_t c2p38 = 0; struct mbox_cmd_late_spl_buffer buffer = { .header = { .size = sizeof(buffer) } }; - uint32_t c2p38 = soc_read_c2p38(); + + if (soc_read_c2p38(&c2p38) != CB_SUCCESS) { + printk(BIOS_ERR, "PSP: Failed to get base address.\n"); + return; + } if (c2p38 & CORE_2_PSP_MSG_38_FUSE_SPL) { printk(BIOS_DEBUG, "PSP: SPL Fusing may be updated.\n"); |