diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-13 17:47:58 +0200 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-27 22:23:56 +0200 |
commit | 61273d46197b724598b6a579951a03321a2789c9 (patch) | |
tree | bbc3b9dee7ae310cb4db52ddd870244ecd7611f5 | |
parent | ed54cc707b77385af69c1854d64447078a0ddc9a (diff) |
x230: Add TPM declaration.
This allows to deactivate TPM on X230.
Change-Id: I73d4272da62335ec3766ce4814d5b46538b190fe
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10273
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
-rw-r--r-- | src/mainboard/lenovo/x230/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/x230/devicetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/lenovo/x230/dsdt.asl | 8 |
3 files changed, 13 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig index 05b7506a3a..1551e27f69 100644 --- a/src/mainboard/lenovo/x230/Kconfig +++ b/src/mainboard/lenovo/x230/Kconfig @@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG select IVYBRIDGE_LVDS select DRIVERS_RICOH_RCE822 + select MAINBOARD_HAS_LPC_TPM # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index 55677a3d7d..c8274e27c1 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -128,6 +128,10 @@ chip northbridge/intel/sandybridge register "dock_event_enable" = "0x01" end + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + chip ec/lenovo/h8 device pnp ff.2 on # dummy io 0x60 = 0x62 diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl index fbe1ae7c15..8f5bbc02bf 100644 --- a/src/mainboard/lenovo/x230/dsdt.asl +++ b/src/mainboard/lenovo/x230/dsdt.asl @@ -52,6 +52,14 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/pch.asl> } } +/* + * LPC Trusted Platform Module + */ +Scope (\_SB.PCI0.LPCB) +{ + #include <drivers/pc80/tpm/acpi/tpm.asl> +} + /* Chipset specific sleep states */ #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> |